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VG26V17400FJ-6 Datasheet

  • VG26V17400FJ-6

  • 4,194,304 x 4 - Bit CMOS Dynamic RAM

  • 25頁(yè)

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VIS
Description
or 3.3V only power supply. Low voltage operation is more suitable to be used on battery
VG26(V)(S)17400FJ
4,194,304 x 4 - Bit
CMOS Dynamic RAM
The device is CMOS Dynamic RAM organized as 4,194,304 words x 4 bits. It is fabricated
with an advanced submicron CMOS technology and designed to operate from a single 5V only
backup, portable electronic application. A new refresh feature called 鈥?self-refresh 鈥?is supported
and very slow CBR cycles are being performed. It is packaged in JEDEC standard 26/24 - pin
plastic SOJ or TSOP (II).
Features
鈥?Single 5V (
鹵
10 %) or 3.3V (+10%,-5%) only power supply
鈥?High speed t
RAC
access time : 50/60 ns
鈥?Low power dissipation
- Active mode :
5V version 605/550 mW (Max.)
3.3V version 396/360 mW (Max.)
- Standby mode :
5V version 1.375 mW (Max.)
3.3V version 0.54 mW (Max.)
鈥?Fast Page Mode access
鈥?I/O level : TTL compatible (Vcc = 5V)
LVTTL compatible (Vcc = 3.3V)
鈥?2048 refresh cycles in 32 ms (Std) or 128ms (S - version)
鈥?4 refresh mode :
- RAS only refresh
- CAS-before-RAS refresh
- Hidden refresh
- Self - refresh (S - version)
Document :
Rev.
Page 1

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