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V62C51864 Datasheet

  • V62C51864

  • 8K X 8 STATIC RAM

  • 62.01KB

  • 10頁

  • MOSEL

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MOSEL VITELIC
V62C51864
8K X 8 STATIC RAM
PRELIMINARY
Features
s
High-speed: 35, 70 ns
s
Ultra low DC operating current of 5mA (max.)
s
Low Power Dissipation:
鈥?TTL Standby: 2 mA (Max.)
鈥?CMOS Standby: 15
m
A (Max.)
s
Fully static operation
s
All inputs and outputs directly compatible
s
Three state outputs
s
Ultra low data retention current (V
CC
= 2V)
s
Single 5V
鹵
10% Power Supply
s
Packages
鈥?28-pin 600 mil PDIP
鈥?28-pin 330 mil SOP (450 mil pin-to-pin)
Description
The V62C51864 is a 65,536-bit static random
access memory organized as 8,192 words by 8
bits. It is built with MOSEL VITELIC鈥檚 high
performance CMOS process. Inputs and three-
state outputs are TTL compatible and allow for
direct interfacing with common system bus
structures.
Functional Block Diagram
A
0
Row
Decoder
512 x 128
Memory Array
V
CC
GND
A
8
I/O
0
Input
Data
Circuit
I/O
7
A
9
CE
2
CE
1
OE
WE
Column I/O
Column Decoder
A
12
Control
Circuit
51864 01
Device Usage Chart
Operating
Temperature
Range
0
擄
C to 70
擄
C
鈥?0
擄
C to +85
擄
C
Package Outline
P
鈥?/div>
鈥?/div>
F
鈥?/div>
鈥?/div>
Access Time (ns)
35
鈥?/div>
鈥?/div>
70
鈥?/div>
鈥?/div>
L
鈥?/div>
鈥?/div>
Power
LL
鈥?/div>
鈥?/div>
Temperature
Mark
Blank
I
V62C51864 Rev. 2.1 June 1998
1

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