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V53C816H40 Datasheet

  • V53C816H40

  • 512K X 16 FAST PAGE MODE CMOS DYNAMIC RAM

  • 215.42KB

  • 18頁(yè)

  • MOSEL

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MOSEL VITELIC
V53C816H
512K X 16 FAST PAGE MODE
CMOS DYNAMIC RAM
PRELIMINARY
HIGH PERFORMANCE
Max. RAS Access Time, (t
RAC
)
Max. Column Address Access Time, (t
CAA
)
Min. Fast Page Mode Cycle Time, (t
PC
)
Min. Read/Write Cycle Time, (t
RC
)
40
40 ns
20 ns
23 ns
75 ns
45
45 ns
22 ns
25 ns
80 ns
50
50 ns
24 ns
28 ns
90 ns
60
60 ns
30 ns
35 ns
110 ns
Features
s
512K x 16-bit organization
s
RAS access time: 40, 45, 50, 60 ns
s
Fast Page Mode for a sustained data rate
of 43 MHz
s
Dual CAS Inputs
s
Pin-to-Pin compatible with 256Kx16
s
Low power dissipation
s
Read-Modify-Write, RAS-Only Refresh,
CAS-Before-RAS Refresh
s
Refresh Interval: 512 cycles/8 ms
s
Available in 40-pin 400 mil SOJ
s
Single +5V Power Supply
s
TTL Interface
Description
The V53C816H is a 524,288 x 16 bit high-perfor-
mance CMOS dynamic random access memory.
The V53C816H offers Fast Page mode with dual
CAS inputs. An address, CAS and RAS input ca-
pacitances are reduced to one half when the
256Kx16 DRAM is used to construct the same
memory density. The V53C816H has asymmetric
address, 10-bit row and 9-bit column.
All inputs are TTL compatible. Fast Page Mode
operation allows random access up to 512K x 16
bits, within a page, with cycle times as short as
23ns.
The V53C816H is best suited for graphics, and
buffer memory applications.
Device Usage Chart
Operating
Temperature
Range
0
擄
C to 70
擄
C
Package Outline
K
鈥?/div>
40
鈥?/div>
Access Time (ns)
45
鈥?/div>
50
鈥?/div>
60
鈥?/div>
Power
Std.
鈥?/div>
Temperature
Mark
Blank
V53C816H Rev. 1.3 February 1999
1

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