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UT62L25716(E) Datasheet

  • UT62L25716(E)

  • ASYNCHRONOUS STATIC RAM- High Speed

  • 108.29KB

  • 13頁

  • ETC

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UTRON
Rev. 1.3
UT62L25716
256K X 16 BIT LOW POWER CMOS SRAM
REVISION HISTORY
REVISION
DESCRIPTION
Preliminary Rev. 0.5
Original.
Rev.1.0
1.Separate Industrial and Commercial SPEC.
2.New waveforms.
3.Add access time 55ns range.
4.The symbols CE1# and OE# and WE# are revised as. CE1 and
OE and
WE
.
Rev.1.1
1.Revised access time 55/70/100ns
-Rev 1.0: 55ns(max) for Vcc=3.0V~3.6V
70/100 ns(max) for Vcc=2.7V~3.6V
2.Revised 鈥淪YMBOL鈥?: CE1 CE
3.Revised ABSOLUTE MAXIMUM RATINGS
- V
TERM
: -0.3 to 4.6
-0.5 to 4.6V
- P
D :
1.0~1.5
1W
- I
OUT
: 50 20mA
4.Revised DC CHARACTERISTICS
- V
IH
: 2.0 2.2V
5.Revised AC CHARACTERISTICS
- t
OH
& t
BLZ
: 5 10ns
6.Revised 48-pin TFBGA package outline dimension錛?/div>
-ball diameter : 0.3mm
0.35mm
Rev.1.2
1. Revised Standby current (LL-Version) : 3uA(typ) 2uA(typ)
2. Revised operating current (Iccmax) : 45/35/25mA 40/30/25mA
3. Revised DC CHARACTERISTICS :
a. Operating Power Supply Current (Icc)
55ns (max) : 45 40mA
70ns (typ) : 25 20mA, 70ns (max) : 35 30mA
100ns (Typ) : 20 16mA
b. Standby current(CMOS) :
LL-version (typ) : 3 2uA, 25 20uA
Rev.1.3
1. Revised V
OH
(Typ) : NA 2.7V
2. Add V
IH
(max)=V
CC
+2.0V for pulse width less than 10ns.
V
IL
(min)=V
SS
-2.0V for pulse width less than 10ns.
3. Add order information for lead free product
Draft Date
Mar, 2001
Jul. 12,2001
Nov. 8. 2002
Dec 03,2002
May 06.2003
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
P80047
1

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