UT621024SC-70LL Datasheet

IC型號：
UT621024SC-70LL
PDF描述：
128K X 8 BIT LOW POWER CMOS SRAM
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UTRON

Rev. 1.5

FEATURES

Access time : 35/55/70ns (max.)

Low power consumption :

Operating : 60/50/40 mA (typical)

Standby : 2碌A (typical) L-version

1碌A (typical) LL-version

Single 5V power supply

All inputs and outputs TTL compatible

Fully static operation

Three state outputs

Data retention voltage : 2V (min.)

Package : 32-pin 600 mil PDIP

32-pin 450 mil SOP

32-pin 8mmx20mm TSOP-1

32-pin 8mmx13.4mm STSOP

UT621024

128K X 8 BIT LOW POWER CMOS SRAM

GENERAL DESCRIPTION

The UT621024 is a 1,048,576-bit low power

CMOS static random access memory

organized as 131,072 words by 8 bits. It is

fabricated using high performance, high

reliability CMOS technology.

The UT621024 is designed for low power

application. It is particularly well suited for

battery back-up nonvolatile memory

application.

The UT621024 operates from a single 5V

power supply and all inputs and outputs are

fully TTL compatible.

PIN CONFIGURATION

Vcc

A15

CE2

FUNCTIONAL BLOCK DIAGRAM

A16

A15

A13

A14

A12

ROW

DECODER

A16

A14

A12

MEMORY ARRAY

VCC

A13

A11

UT621024

1024 ROWS 脳 1024 COLUMNS

VSS

I/O1

I/O2

A10

CE1

I/O8

I/O7

I/O6

I/O5

I/O4

I/O1

I/O8

I/O3

Vss

I/O

CONTROL

COLUMN I/O

COLUMN DECODER

A11

PDIP / SOP

CE2

LOGIC

CONTROL

A10

A10 A11 A9 A3 A2 A1 A0

A13

I/O8

I/O7

I/O6

I/O5

I/O4

Vss

I/O3

I/O2

I/O1

PIN DESCRIPTION

SYMBOL

A0 - A16

I/O1 - I/O8

,CE2

DESCRIPTION

Address Inputs

Data Inputs/Outputs

Chip enable 1,2 Inputs

Write Enable Input

Output Enable Input

Power Supply

Ground

No Connection

CE2

A15

Vcc

A16

A14

A12

UT621024

TSOP-I/STSOP

________________________________________________________________________________________________

UTRON TECHNOLOGY INC.

P80036

1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.

TEL: 886-3-5777882 FAX: 886-3-5777919

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