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UT54LVDSC031-UPX Datasheet

  • UT54LVDSC031-UPX

  • Interface IC

  • 12頁

  • ETC

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Standard Products
UT54LVDSC031 Quad Driver
Data Sheet
April 2, 2001
FEATURES
q
q
q
q
q
q
q
q
q
>155.5 Mbps (77.7 MHz) switching rates
+340mV nominal differential signaling
5 V power supply
Cold Spare LVDS outputs
TTL compatible inputs
Ultra low power CMOS technology
5.0ns maximum, propagation delay
3.0ns maximum, differential skew
Radiation-hardened design; total dose irradiation testing to
MIL-STD-883 Method 1019
- Total-dose: 300 krad(Si)
- Latchup immune (LET > 111 MeV-cm
2
/mg)
Packaging options:
- 16-lead flatpack (dual in-line)
Standard Microcircuit Drawing 5962-95833
- QML Q and V compliant part
Compatible with IEEE 1596.3SCI LVDS
Compatible with ANSI/TIA/EIA 644-1996 LVDS Standard
INTRODUCTION
The UT54LVDSC031 Quad Driver is a quad CMOS
differential line driver designed for applications requiring
ultra low power dissipation and high data rates. The device
is designed to support data rates in excess of 155.5 Mbps
(77.7 MHz) utilizing Low Voltage Differential Signaling
(LVDS) technology.
The UT54LVDSC031 accepts TTL input levels and
translates them to low voltage (340mV) differential output
signals. In addition, the driver supports a three-state
function that may be used to disable the output stage,
disabling the load current, and thus dropping the device to
an ultra low idle power state.
The UT54LVDSC031 and companion quad line receiver
UT54LVDSC032 provide new alternatives to high power
pseudo-ECL devices for high speed point-to-point interface
applications.
All LVDS pins have Cold Spare buffers. These buffers will
be high impedance when V
DD
is tied to V
SS
.
q
q
q
q
D
IN1
D
OUT1+
D1
D
OUT1-
D
IN2
D
OUT2+
D2
D
OUT2-
D
OUT3+
D3
D
OUT3-
D
OUT4+
D4
D
OUT4-
D
IN3
D
IN4
EN
EN
Figure 1. UT54LVDSC031 Quad Driver Block Diagram

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