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UPD784218YGF Datasheet

  • UPD784218YGF

  • 16-/8-BIT SINGLE-CHIP MICROCONTROLLERS

  • 92頁

  • NEC   NEC

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DATA SHEET
碌
PD784218, 784218Y
16-/8-BIT SINGLE-CHIP MICROCONTROLLERS
MOS INTEGRATED CIRCUIT
DESCRIPTION
The
碌
PD784218 is a member of the
碌
PD784218 Subseries of the 78K/IV Series. In addition to a high-speed and
high-performance CPU, the
碌
PD784218 incorporates a variety of peripheral hardware such as ROM, RAM, I/O ports,
8-bit resolution A/D and D/A converters, timers, serial interfaces, real-time output ports, and an interrupt function.
The
碌
PD784218Y
Note
is the
碌
PD784218 Subseries with a multi-master supporting I
2
C bus interface added.
Flash memory versions, the
碌
PD78F4218 and 78F4218Y, which can operate in the same voltage range as the
mask ROM versions, and various development tools are also available.
Note
Under development
Detailed function descriptions are provided in the following user鈥檚 manuals. Be sure to read them before
designing.
碌
PD784218, 784218Y Subseries User鈥檚 Manual Hardware: U12970E
78K/IV Series User鈥檚 Manual Instructions:
U10905E
FEATURES
鈥?On-chip ROM correction function
鈥?Inherits peripheral functions of
碌
PD78078Y Subseries
鈥?Minimum instruction execution time
160 ns
(@ f
XX
= 12.5 MHz operation with main system clock)
61
碌
s
(@ f
XT
= 32.768 kHz operation with subsystem clock)
鈥?Internal high-capacity memory
路 ROM: 256 KB
路 RAM: 12,800 bytes
鈥?I/O ports: 86
鈥?Timer/counters: 16-bit timer/event counter
脳
1 unit
8-bit timer/event counter
脳
6 units
鈥?Serial interfaces: 3 channels
UART/IOE (3-wire serial I/O): 2 channels
CSI (3-wire serial I/O, multi-master supporting
bus
Note
): 1 channel
Note
碌
PD784218Y only
Unless otherwise specified, references in this document to the
碌
PD784218 refer to the
碌
PD784218 and
the
碌
PD784218Y.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
鈥?Standby function
HALT/STOP/IDLE mode
In power-saving mode: HALT/IDLE mode (with
subsystem clock)
鈥?Clock division function
鈥?Watch timer: 1 channel
鈥?Watchdog timer: 1 channel
鈥?Clock output function
Selectable from f
XX
, f
XX
/2, f
XX
/2
2
, f
XX
/2
3
, f
XX
/2
4
,
f
XX
/2
5
, f
XX
/2
6
, f
XX
/2
7
, f
XT
鈥?Buzzer output function
Selectable from f
XX
/2
10
, f
XX
/2
11
, f
XX
/2
12
, f
XX
/2
13
鈥?A/D converter: 8-bit resolution
脳
8 channels
鈥?D/A converter: 8-bit resolution
脳
2 channels
鈥?Supply voltage: V
DD
= 2.2 to 5.5 V
I
2
C
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. U12304EJ2V0DS00 (2nd edition)
Date Published March 2000 N CP(K)
Printed in Japan
The mark
shows major revised points.
漏
1997, 2000

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