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UPD784215GC-XXX-8EU Datasheet

  • UPD784215GC-XXX-8EU

  • MICROCONTROLLER|16-BIT|UPD78K4 CPU|CMOS|QFP|100PIN|PLASTIC

  • 442.13KB

  • 92頁(yè)

  • ETC

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DATA SHEET
MOS INTEGRATED CIRCUIT
碌
PD784214,784215,784216,784214Y,784215Y,784216Y
16/8-BIT SINGLE-CHIP MICROCONTROLLERS
DESCRIPTION
The
碌
PD784214, 784215, and 784216 are products of the
碌
PD784216 Subseries in the 78K/IV Series. Besides
a high-speed and high-performance CPU, these controllers have ROM, RAM, I/O ports, 8-bit resolution A/D and
D/A converters, timer, serial interface, real-time output ports, and interrupt functions and various other peripheral
hardware.
The
碌
PD784214Y, 784215Y, and 784216Y are based on the
碌
PD784216 Subseries with the addition of a
multimaster-supporting I
2
C bus interface.
The
碌
PD78F4216 and 78F4216Y, products with a flash memory instead of a masked ROM used as internal ROM,
as well as a variety of development tools are also available.
Detailed function descriptions are provided in the following user鈥檚 manuals. Be sure to read them before
designing.
碌
PD784216, 784216Y Subseries User鈥檚 Manual Hardware: U12015E
78K/IV Series User鈥檚 Manual Instructions:
U10905E
FEATURES
鈥?78K/IV Series
鈥?Inherits peripheral functions of
碌
PD78078Y Subseries
鈥?Minimum instruction execution time
160 ns
(@ f
XX
= 12.5 MHz operation with main system clock)
61
碌
s
(@ f
XT
= 32.768 kHz operation with subsystem clock)
鈥?I/O port: 86 pins
鈥?Timer/counter:
鈥?/div>
鈥?/div>
鈥?Standby function
HALT/STOP/IDLE mode
In power-saving mode:
subsystem clock)
鈥?Clock division function
鈥?Watch timer: 1 channel
鈥?Watchdog timer: 1 channel
鈥?Clock output function
Selectable from f
XX
, f
XX
/2, f
XX
/2
2
, f
XX
/2
3
, f
XX
/2
4
,
f
XX
/2
5
, f
XX
/2
6
, f
XX
/2
7
, f
XT
鈥?Buzzer output function
Selectable from f
XX
/2
10
, f
XX
/2
11
, f
XX
/2
12
, f
XX
/2
13
鈥?A/D converter: 8-bit resolution
脳
8 channels
鈥?D/A converter: 8-bit resolution
脳
2 channels
鈥?Supply voltage: V
DD
= 2.2 to 5.5 V
HALT/IDLE mode (with
16-bit timer/event counter
脳
1 unit
8-bit timer/event counter
脳
6 units
鈥?Serial interface: 3 channels
UART/IOE (3-wire serial I/O): 2 channels
CSI (3-wire serial I/O, multi-master I
2
C bus
Note
supported): 1 channel
Note
碌
PD784216Y Subseries only.
Unless otherwise specified, the
碌
PD784216 is treated as the representative model throughout this
document.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability
and additional information.
Document No. U11725EJ2V0DS00 (2nd edition)
Date Published February 2000 N CP(K)
Printed in Japan
The mark
shows major revised points.
漏
1996,2000

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