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UPD784216AYGC Datasheet

  • UPD784216AYGC

  • 16-BIT SINGLE-CHIP MICROCONTROLLERS

  • 100頁(yè)

  • NEC   NEC

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DATA SHEET
MOS INTEGRATED CIRCUIT
碌
PD784214A, 784215A, 784216A, 784217A, 784218A, 784214AY, 784215AY, 784216AY, 784217AY, 784218AY
16-BIT SINGLE-CHIP MICROCONTROLLERS
DESCRIPTION
The
碌
PD784214A, 784215A, 784216A, 784217A, and 784218A are products of the
碌
PD784216A/784218A
Subseries in the 78K/IV Series. Besides a high-speed and high performance CPU, these controllers have ROM,
RAM, I/O ports, 8-bit resolution A/D and D/A converters, timers, serial interfaces, a real-time output port, interrupt
functions, and various other peripheral hardware.
The
碌
PD784214AY, 784215AY, 784216AY, 784217AY, and 784218AY are based on the
碌
PD784216Y/784218Y
Subseries with the addition of a multimaster-supporting I
2
C bus interface.
The
碌
PD78F4218A and 78F4218AY, products with a flash memory instead of the internal ROM of mask ROM
versions, and various development tools are also available.
Detailed function descriptions are provided in the following user鈥檚 manuals. Be sure to read them before
designing.
碌
PD784216A, 784216AY Subseries User鈥檚 Manual Hardware: U13570E
碌
PD784218A, 784218AY Subseries User鈥檚 Manual Hardware: U12970E
78K/IV Series User鈥檚 Manual Instructions:
U10905E
FEATURES
鈥?/div>
78K/IV Series
鈥?/div>
Inherits peripheral functions of
碌
PD78078, 78078Y
Subseries
鈥?/div>
Minimum instruction execution time
160 ns
(@f
XX
= 12.5 MHz operation with main system clock)
61
碌
s
(@f
XT
= 32.768 kHz operation with subsystem clock)
鈥?/div>
I/O port: 86 pins
鈥?/div>
Timer/event counter:
鈥?/div>
16-bit timer/event counter
脳
1 unit
鈥?/div>
8-bit timer/event counter
脳
6 units
鈥?/div>
Serial interface: 3 channels
鈥?/div>
UART/IOE (3-wire serial I/O): 2 channels
鈥?/div>
CSI (3-wire serial I/O, I
2
C bus supporting
multimaster
Note
): 2 channels
Note
碌
PD784216AY/784218AY Subseries only
鈥?/div>
Supply voltage: V
DD
= 1.8 to 5.5 V
鈥?/div>
Standby function
HALT/STOP/IDLE mode
In low-power consumption mode: HALT/IDLE mode
(with subsystem clock)
鈥?/div>
Clock division function
鈥?/div>
Watch timer: 1 channel
鈥?/div>
Watchdog timer: 1 channel
鈥?/div>
Clock output function
Selectable from f
XX
, f
XX
/2, f
XX
/2
2
, f
XX
/2
3
, f
XX
/2
4
, f
XX
/2
5
,
f
XX
/2
6
, f
XX
/2
7
, f
XT
鈥?/div>
Buzzer output function
10
11
12
13
Selectable from f
XX
/2 , f
XX
/2 , f
XX
/2 , f
XX
/2
鈥?/div>
A/D converter: 8-bit resolution
脳
8 channels
鈥?/div>
D/A converter: 8-bit resolution
脳
2 channels
APPLICATIONS
Cellular phones, PHS, cordless telephones, CD-ROM, AV equipment
Unless otherwise specified, references in this document to the
碌
PD784218A, 784218AY refer to the
碌
PD784214A, 784215A, 784216A, 784217A, 784218A, 784214AY, 784215AY, 784216AY, 784217AY, and
784218AY.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. U14121EJ2V0DS00 (2nd edition)
Date Published August 2000 N CP(K)
Printed in Japan
The mark
shows major revised points.
2000

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