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UPD77019 Datasheet

  • UPD77019

  • 16 bits, Fixed-point Digital Signal Processor

  • 355.97KB

  • 56頁

  • NEC   NEC

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DATA SHEET
MOS INTEGRATED CIRCUIT
碌
PD77018A, 77019
16 bits, Fixed-point Digital Signal Processor
碌
PD77018A, 77019 are 16 bits fixed-point DSPs (Digital Signal Processors) developed for digital signal processing
with its demand for high speed and precision.
Maximum operating speed of the
碌
PD77018A, 77019 is improved compared with the
碌
PD77015, 77017, 77018.
And the
碌
PD77019 internal instruction RAM (4K
脳
32 bits) is suitable for program code replacement.
FEATURES
鈥?/div>
FUNCTIONS
鈥?Instruction cycle: 16.6 ns (MIN.)
Operation clock: 60 MHz
External clock: 60, 30, 20, 15, 7.5 MHz
Crystal: 60 MHz
鈥?On-chip PLL to provide higher operation clock than the external clock
鈥?Dual load/store
鈥?Hardware loop function
鈥?Conditional execution
鈥?Executes product-sum operation in one instruction cycle
鈥?/div>
PROGRAMMING
鈥?16 bits
脳
16 bits + 40 bits
鈫?/div>
40 bits multiply accumulator
鈥?8 general registers (40 bits each)
鈥?8 ROM/RAM data pointer: each data memory area has 4 registers
鈥?10 source interrupts (external: 4, internal: 6)
鈥?3 operand instructions (example: R0 = R0 +R1L鈭桼2L)
鈥?Nonpipeline on execution stage
鈥?/div>
MEMORY AREAS
鈥?Instruction memory area : 64K words
脳
32 bits
鈥?Data memory areas : 64K words
脳
16 bits
脳
2 (X memory, Y memory)
In this document, all descriptions of the
碌
PD77018A also apply to the
碌
PD77019, unless otherwise
specified.
The information in this document is subject to change without notice.
Document No. U11849EJ2V0DS00 (2nd edition)
Date Published October 1997 N
Printed in Japan
The mark
shows major revised points.
漏
1996

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