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UPD72042BGT Datasheet

  • UPD72042BGT

  • LSI DEVICES FOR Inter Equipment BusTM (IEBusTM) PROTOCOL CON...

  • 534.39KB

  • 92頁

  • NEC   NEC

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DATA SHEET
碌
PD72042A, 72042B
LSI DEVICES FOR Inter Equipment Bus
TM
(IEBus
TM
)
PROTOCOL CONTROL
MOS INTEGRATED CIRCUIT
The
碌
PD72042A and
碌
PD72042B are microcomputer peripheral LSI devices for IEBus protocol control.
The
碌
PD72042A and
碌
PD72042B perform all the processing required for layers 1 and 2 of the IEBus. The devices
incorporate large transmission and reception buffers, allowing the microcomputer to perform IEBus operations without
interruption. They also contain an IEBus driver and receiver, allowing them to directly connected to the bus directly.
FEATURES
鈥?/div>
Control of layers 1 and 2 of the IEBus protocol
鈥?Support of a multi-master scheme
鈥?Broadcast function
鈥?Two communication modes having different
transmission speeds can be selected.
When operating
at 6 MHz
Mode 0
Mode 1
q
q
鈥?/div>
Microcomputer interface
Three-/two-wire serial I/O
鈥?Transfer starting with MSB
鈥?Transfer starting with LSB
watchdog timer.
:
碌
PD72042A
:
碌
PD72042B
鈥?/div>
Program crashes can be detected by means of a
鈥?/div>
Low power consumption (standby mode):
50
碌
A (max)
When operating
at 6.29 MHz
Approx. 4.1 Kbps
Approx. 18 Kbps
Approx. 3.9 Kbps
Approx. 17 Kbps
鈥?/div>
Oscillator frequency (f ):
X
6 MHz, 6.29 MHz
鈥?frequency accuracy:
鹵1.5%
5 V
鹵10%
鈥?/div>
Operating voltage:
Built-in IEBus driver and receiver
Transmission and reception buffers
Transmission buffer
Reception buffer
: 33 bytes, FIFO
: 40 bytes, FIFO (capable of
holding more than one frame
of reception data.)
ORDERING INFORMATION
Part number
Package
16-pin plastic SOP (375 mil)
16-pin plastic SOP (375 mil)
Starting with MSB/LSB
MSB
LSB
碌
PD72042AGT
碌
PD72042BGT
The information in this document is subject to change without notice.
Document No. S13990EJ2V0DS00 (2nd edition)
(Previous No. ID-3649)
Date Published January 1999 N CP(N)
Printed in Japan
The mark
shows major revised points.
漏
1995

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