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UPD70F3017AYF1-EA6-A Datasheet

  • UPD70F3017AYF1-EA6-A

  • Microcontroller, 32-Bit, FLASH, 20MHz, CMOS, PBGA121, 12 X 1...

  • 48頁

  • NEC   NEC

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DATA SHEET
MOS INTEGRATED CIRCUIT
P
PD70F3017A, 70F3017AY
V850/SA1
32-/16-BIT SINGLE-CHIP MICROCONTROLLER
TM
The
P
PD70F3017A, 70F3017AY are products with on-chip flash memory.
production of a variety of products, and rapid development of new products.
Because the devices can be
programmed by the user on-board, they are ideal for the evaluation stages of system development, small-scale
The V850/SA1 provides a high-level cost performance ideal for applications ranging from low-power camcorders
and other AV equipment to portable telephone equipment such as cellular phones and personal handyphone
systems (PHS).
Detailed function descriptions are provided in the following user's manuals. Be sure to read them before
designing.
V850/SA1 User's Manual Hardware:
TM
V850 Family User's Manual Architecture:
FEATURES
{
Number of instructions: 74
{
Minimum instruction execution time:
59 ns (@ 17 MHz operation with main system
clock (f
XX
))
50 ns (@ 20 MHz operation with main system
clock (f
XX
))
30.5
P
s (@ 32.768 kHz operation with subsystem
clock (f
XT
))
{
General-purpose registers: 32 bits
u
32 registers
{
Instruction set:
Signed multiplication, saturation operations, 32-bit
shift instructions, bit manipulation instructions,
load/store instructions
{
Memory space:
16 MB linear address space
Memory block division function: 2 MB per block
{
External bus interface: 16-bit data bus
Address bus: Separate output enabled
{
Internal memory
Flash memory: 256 KB
RAM: 8 KB
U12768E
U10243E
{
Interrupts and exceptions
External: 8, internal: 23, exceptions: 1
{
I/O lines Total: 85
{
Timer/counters
16-bit timer:
8-bit timer:
2 channels
4 channels
{
Watch timer: 1 channel
{
Watchdog timer: 1 channel
{
Serial interface (SIO)
Asynchronous serial interface (UART)
Clocked serial interface (CSI)
2
I C bus interface (
P
PD70F3017AY)
{
A/D converter: 12 channels
{
DMA controller: 3 channels
{
RTP: 8 bits
u
1 channel or 4 bits
u
2 channels
{
Power-saving functions: HALT/IDLE/STOP modes
{
Packages: 100-pin plastic LQFP (14
u
14 mm)
121-pin plastic FBGA (12
u
12 mm)
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Document No. U14527EJ2V0DS00 (2nd edition)
Date Published August 2000 J CP(K)
Printed in Japan
The mark
shows major revised points.
漏
2000

UPD70F3017AYF1-EA6-A 產(chǎn)品屬性

  • 0現(xiàn)貨

  • 停產(chǎn)

  • V850/Sx1

  • 卷帶（TR）

  • 停產(chǎn)

  • V850

  • 32 位單核

  • 20MHz

  • CSI，EBI/EMI，I2C，UART/USART

  • DMA，PWM，WDT

  • 72

  • 256KB（256K x 8）

  • 閃存

  • -

  • 8K x 8

  • 2.7V ~ 3.6V

  • A/D 12x10b

  • 內(nèi)部

  • -40°C ~ 85°C（TA）

  • 表面貼裝型

  • 121-LFBGA

  • 121-FBGA（12x12）

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