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UPD703078YGC-XXX-8EU Datasheet

  • UPD703078YGC-XXX-8EU

  • MICROCONTROLLER|32-BIT|V850 CPU|CMOS|QFP|100PIN|PLASTIC

  • 403.47KB

  • 52頁

  • ETC

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DATA SHEET
碌
PD703078Y, 703079Y, 70F3079Y
V850/SF1
32-BIT SINGLE-CHIP MICROCONTROLLERS
TM
MOS INTEGRATED CIRCUIT
DESCRIPTION
The
碌
PD703078Y, 703079Y, and 70F3079Y (V850/SF1) are 32-bit single-chip microcontrollers of the V850
Series
TM
for AV equipment. A 32-bit CPU, ROM, RAM, timer/counters, serial interfaces, an A/D converter, DMA
controller, and FCAN controller are integrated on a single chip.
The
碌
PD70F3079Y has flash memory in place of the internal mask ROM of the
碌
PD703078Y and 703079Y.
Because flash memory allows the program to be written and erased electrically with the device mounted on the
board, these products are ideal for the evaluation stages of system development, small-scale production of a variety
of products, and rapid development of new products.
Detailed function descriptions are provided in the following user鈥檚 manuals. Be sure to read them before
designing.
V850/SF1 Hardware User鈥檚 Manual:
U14665E
V850 Series Architecture User鈥檚 Manual:
U10243E
FEATURES
Number of instructions: 74
Minimum instruction execution time: 62.5 ns (16 MHz internal operation)
General-purpose registers: 32 bits
脳
32 registers
Instruction set: Signed multiplication, saturation operations, 32-bit shift instructions, bit manipulation instructions,
load/store instructions
Memory space: 16 MB linear address space
Internal memory ROM: 256 KB (
碌
PD703078Y, 703079Y: mask ROM)
256 KB (
碌
PD70F3079Y: flash memory)
RAM: 16 KB (
碌
PD703078Y, 703079Y, 70F3079Y)
Interrupt/exception:
碌
PD703078Y (external: 8, internal: 35 sources, exception: 1 source)
碌
PD703079Y, 70F3079Y (external: 8, internal: 38 sources, exception: 1 source)
I/O lines Total: 83
Timer/counters: 16-bit timer (3 channels: TM0, TM1, TM7)
8-bit timer (5 channels: TM2 to TM6)
Watch timer: 1 channel
Watchdog timer: 1 channel
Serial interface
鈥?/div>
Asynchronous serial interface (UART0, UART1)
鈥?/div>
Clocked serial interface (CSI0, CSI1, CSI3)
鈥?/div>
3-wire variable length serial interface (CSI4)
鈥?/div>
I C bus interface (I C0)
2
2
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. U15183EJ2V0DS00 (2nd edition)
Date Published January 2002 N CP(K)
Printed in Japan
The mark
shows major revised points.
漏
2000, 2002

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