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UPD4992GS-T2 Datasheet

  • UPD4992GS-T2

  • 8-Bit Parallel I/O Calendar Clock

  • 102.43KB

  • 16頁

  • NEC   NEC

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PRELIMINARY DATA SHEET
MOS INTEGRATED CIRCUIT
碌
PD4992
8-Bit Parallel I/O Calendar Clock
The
碌
PD4992 is a CMOS integrated circuit which outputs 8-bit parallel time and calendar data in a system in which
a microprocessor is employed. The
碌
PD4992 operates at 32.768 kHz and provides year, month, day of month, day
of week, hour, minute, and second data to a system. The
碌
PD4992 internally contains a voltage regulator so that
low power consumption operation and high accuracy are realized even if the supply voltage varies. The
碌
PD4992
uses the 8-bit bus to facilitate interfacing with a microprocessor.
FEATURES:
鈥?Internal counter for time (hour, minute, second), and calendar (leap year, year, month, day of month, day of week)
鈥?Super low power consumption (I
DD
= 2
碌
A MAX. at V
DD
= 2.4 V)
鈥?Automatic determination of leap year, manual setting possible
鈥?12 hour/24 hour mode selectable
鈥?8-bit parallel input/output in BCD data format
鈥?12 kinds of interval timer output (can be used as watchdog timer)
鈥?Internal voltage detection circuit for automatic determination of battery run-down
鈥?High accuracy
ORDERING INFORMATION:
Order Code
Package
20-pin plastic DIP (300 mil)
20-pin plastic SOP (300 mil)
20-pin plastic SOP (300 mil)
Provided on adhesive tape
20-pin plastic SOP (300 mil)
Provided on embossed carrier tape
碌
PD4992CX
碌
PD4992GS
碌
PD4992GS-T1, T2
碌
PD4992GS-E2
The information in this document is subject to change without notice.
Document No. ID-3084 (1st edition)
(O.D. No. ID-8222)
Date Published March 1997 P
Printed in Japan
漏
1995
1992

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