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UPD464336ALS1-A44 Datasheet

  • UPD464336ALS1-A44

  • x36 Fast Synchronous SRAM

  • 200.54KB

  • 28頁

  • ETC

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DATA SHEET
PD464318AL, 464336AL
4M-BIT Bi-CMOS SYNCHRONOUS FAST STATIC RAM
256K-WORD BY 18-BIT / 128K-WORD BY 36-BIT
HSTL INTERFACE / REGISTER-REGISTER / LATE WRITE
Description
The
PD464318AL is a 262,144 words by 18 bits, and the
PD464336AL is a 131,072 words by 36 bits
synchronous static RAM fabricated with advanced Bi-CMOS technology using N-channel memory cell.
This technology and unique peripheral circuits make the
PD464318AL and
PD464336AL a high-speed device.
The
PD464318AL and
PD464336AL are suitable for applications which require high-speed, low voltage, high-
density memory and wide bit configuration, such as cache and buffer memory.
These are packaged in a 119-pin plastic BGA (Ball Grid Array).
MOS INTEGRATED CIRCUIT
Features
鈥?/div>
Fully synchronous operation
鈥?/div>
HSTL Input / Output levels
鈥?/div>
Fast clock access time : 2.0 ns / 250 MHz, 2.3 ns / 225 MHz, 2.5 ns / 200 MHz
鈥?/div>
Asynchronous output enable control : /G
鈥?/div>
Byte write control : /SBa (DQa1-9), /SBb (DQb1-9), /SBc (DQc1-9), /SBd (DQd1-9)
鈥?/div>
Common I/O using three-state outputs
鈥?/div>
Internally self-timed write cycle
鈥?/div>
Late write with 1 dead cycle between Read-Write
鈥?/div>
User-configurable outputs :
Controlled impedance outputs or push-pull outputs
鈥?/div>
Boundary scan (JTAG) IEEE 1149.1 compatible
鈥?/div>
3.3 V (Chip) / 1.5V (I/O) supply
鈥?/div>
119 bump BGA package, 1.27 mm pitch, 14 mm x 22 mm
鈥?/div>
Sleep mode : ZZ(Enables sleep mode, active high)
Ordering Information
Part number
Access time
2.0 ns
2.3 ns
2.5 ns
2.0 ns
2.3 ns
2.5 ns
Clock frequency
250 MHz
225 MHz
200 MHz
250 MHz
225 MHz
200 MHz
Package
119-pin plastic BGA
PD464318ALS1-A4
PD464318ALS1-A44
PD464318ALS1-A5
PD464336ALS1-A4
PD464336ALS1-A44
PD464336ALS1-A5
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. M13508EJ2V0DSJ1 (2nd edition)
Date Published December 2000 NS CP(K)
Printed in Japan
The mark
鈥?/div>
shows major revised points.
1999

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