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UPD44324082F5-E50-EQ2 Datasheet

  • UPD44324082F5-E50-EQ2

  • 36M-BIT DDRII SRAM 2-WORD BURST OPERATION

  • 32頁

  • NEC   NEC

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PRELIMINARY DATA SHEET
MOS INTEGRATED CIRCUIT
碌
PD44324082, 44324092, 44324182, 44324362
36M-BIT DDRII SRAM
2-WORD BURST OPERATION
Description
The
碌
PD44324082 is a 4,194,304-word by 8-bit, the
碌
PD44324092 is a 4,194,304-word by 9-bit, the
碌
PD44324182 is a
2,097,152-word by 18-bit and the
碌
PD44324362 is a 1,048,576-word by 36-bit synchronous double data rate static RAM
fabricated with advanced CMOS technology using full CMOS six-transistor memory cell.
The
碌
PD44324082,
碌
PD44324092,
碌
PD44324182 and
碌
PD44324362 integrate unique synchronous peripheral circuitry
and a burst counter. All input registers controlled by an input clock pair (K and /K) are latched on the positive edge of K
and /K.
These products are suitable for application which require synchronous operation, high speed, low voltage, high
density and wide bit configuration.
These products are packaged in 165-pin PLASTIC FBGA.
Features
鈥?/div>
1.8 鹵 0.1 V power supply and HSTL I/O
鈥?/div>
DLL circuitry for wide output data valid window and future frequency scaling
鈥?/div>
Pipelined double data rate operation
鈥?/div>
Common data input/output bus
鈥?/div>
Two-tick burst for low DDR transaction size
鈥?/div>
Two input clocks (K and /K) for precise DDR timing at clock rising edges only
鈥?/div>
Two output clocks (C and /C) for precise flight time
and clock skew matching-clock and data delivered together to receiving device
鈥?/div>
Internally self-timed write control
鈥?/div>
Clock-stop capability with
碌
s restart
鈥?/div>
User programmable impedance output
鈥?/div>
Fast clock cycle time : 3.3 ns (300 MHz), 4.0 ns (250 MHz), 5.0 ns (200 MHz)
鈥?/div>
Simple control logic for easy depth expansion
鈥?/div>
JTAG boundary scan
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. M16780EJ1V0DS00 (1st edition)
Date Published October 2004 NS CP(K)
Printed in Japan
The mark
shows major revised points.
2003

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