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UPC1862GS Datasheet

  • UPC1862GS

  • BURST LOCK CLOCK GENERATOR

  • 250.78KB

  • 32頁

  • NEC   NEC

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DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
碌
PC1862
BURST LOCK CLOCK GENERATOR
The
碌
PC1862 is an LSI incorporating a PLL circuit to generate nf
SC
clocks (f
SC
: color subcarrier frequency), ideal
for the processing of digital video signals as in extended definition television (EDTV) systems.
FEATURES
鈥?VCO is incorporated.
鈥?Horizontal and vertical sync separation circuits are incorporated (with output pins).
鈥?Horizontal and vertical sync output pulses (TTL level)
鈥?ACC amplifier and killer detector circuits are incorporated.
鈥?1/4 and 1/8 (1/2
脳
1/4) frequency dividers are incorporated.
鈥?f
SC
phase control circuits is incorporated.
鈥?Applicable to both NTSC and PAL systems.
鈥?Possible to input burst gate pulse from external
ORDERING INFORMATION
Part number
Package
36-pin plastic shrink SOP (300 mil)
碌
PC1862GS
The information in this document is subject to change without notice.
Document No. S11431EJ3V0DS00 (3rd edition)
Date Published December 1997 N CP(K)
Printed in Japan
The mark
shows major revised points.
漏
1991, 1996

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