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UPA1763G Datasheet

  • UPA1763G

  • SWITCHING DUAL N-CHANNEL POWER MOS FET INDUSTRIAL USE

  • 8頁(yè)

  • NEC   NEC

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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
碌
PA1763
SWITCHING
DUAL N-CHANNEL POWER MOS FET
INDUSTRIAL USE
DESCRIPTION
The
碌
PA1763 is N-Channel MOS Field Effect Transistor
designed for DC/DC Converters.
PACKAGE DRAWING (Unit : mm)
8
5
1 : Source 1
2 : Gate 1
7, 8 : Drain 1
3 : Source 2
4 : Gate 2
5, 6 : Drain 2
6.0 鹵0.3
4.4
+0.10
鈥?.05
FEATURES
鈥?/div>
Dual chip type
鈥?/div>
Low on-resistance
R
DS(on)1
= 47.0 m鈩?MAX. (V
GS
= 10 V, I
D
= 2.3 A)
R
DS(on)2
= 57.0 m鈩?MAX. (V
GS
= 4.5 V, I
D
= 2.3 A)
R
DS(on)3
= 66.0 m鈩?MAX. (V
GS
= 4.0 V, I
D
= 2.3 A)
鈥?/div>
Low input capacitance
C
iss
= 870 pF TYP.
鈥?/div>
Built-in G-S protection diode
鈥?/div>
Small and surface mount package (Power SOP8)
1.8 MAX.
5
5
5
5
1
4
5.37 MAX.
1.44
0.8
0.15
0.05 MIN.
0.5 鹵0.2
0.10
1.27 0.78 MAX.
0.40
+0.10
鈥?.05
0.12 M
ORDERING INFORMATION
PART NUMBER
PACKAGE
Power SOP8
碌
PA1763G
ABSOLUTE MAXIMUM RATINGS (T
A
= 25 擄C, All terminals are connected.)
Drain to Source Voltage
Gate to Source Voltage
Drain Current (DC)
Drain Current (pulse)
Note1
Note2
Note2
V
DSS
V
GSS
I
D(DC)
I
D(pulse)
P
T
P
T
I
AS
E
AS
T
ch
T
stg
60
鹵20
鹵4.5
鹵18
1.7
2.0
4.5
60
150
鈥?5 to + 150
V
V
A
A
W
W
A
mJ
擄C
擄C
Gate
Protection
Diode
Source
Gate
Body
Diode
EQUIVALENT CIRCUIT
(1/2 Circuit)
Drain
Total Power Dissipation (1 unit)
Total Power Dissipation (2 unit)
5
5
Single Avalanche Current
Single Avalanche Energy
Channel Temperature
Storage Temperature
Note3
Note3
5
Notes 1.
PW
鈮?/div>
10
碌
s, Duty cycle
鈮?/div>
1 %
2
2.
T
A
= 25 擄C, Mounted on ceramic substrate of 1200 mm x 2.2 mm
3.
Starting T
ch
= 25 擄C, R
G
= 25
鈩?
V
GS
= 20 V
鈫?/div>
0 V
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
Exceeding the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No.
G14056EJ1V0DS00 (1st edition)
Date Published January 2000 NS CP(K)
Printed in Japan
The mark
5
shows major revised points.
漏
1999, 2000

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