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UPA1520BH Datasheet

  • UPA1520BH

  • N-CHANNEL POWER MOS FET ARRAY SWITCHING USE

  • 8頁(yè)

  • NEC   NEC

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DATA SHEET
Compound Field Effect Power Transistor
碌
PA1520B
N-CHANNEL POWER MOS FET ARRAY
SWITCHING USE
DESCRIPTION
The
碌
PA1520B is N-channel Power MOS FET Array that
built in 4 circuits designed for solenoid, motor and lamp
driver.
26.8 MAX.
10
PACKAGE DIMENSIONS
in millimeters
4.0
FEATURES
鈥?4 V driving is possible
鈥?Large Current and Low On-state Resistance
I
D (DC)
=
鹵2.0
A
R
DS (on)
1
鈮?/div>
0.17
鈩?/div>
MAX. (V
GS
= 10 V, I
D
= 1 A)
R
DS (on)
1
鈮?/div>
0.25
鈩?/div>
MAX. (V
GS
= 4 V, I
D
= 1 A)
鈥?Low Input Capacitance Ciss = 220 pF TYP.
2.54
1.4 0.6鹵0.1
1.4
0.5鹵0.1
ORDERING INFORMATION
Type Number
Package
10 Pin SIP
3
1 2 3 4 5 6 7 8 9 10
CONNECTION DIAGRAM
5
7
9
碌
PA1520BH
ABSOLUTE MAXIMUM RATINGS (T
A
= 25
擄
C)
Drain to Source Voltage
Gate to Source Voltage
Drain Current (DC)
Drain Current (pulse)
Total Power Dissipation
Total Power Dissipation
Channel Temperature
Storage Temperature
Notes 1.
V
GS
= 0
3.
PW
鈮?/div>
10
碌
s, Duty Cycle
鈮?/div>
1 %
3.
4 circuits, T
A
= 25
擄C
V
DSS
Note 1
V
GSS
Note 2
ID
(DC)
ID
(pulse)
Note 3
P
T1
Note 4
P
T2
Note 5
T
CH
T
stg
30
鹵20
鹵2.0
鹵8.0
28
3.5
150
鈥?5 to +150
V
V
A/unit
A/unit
W
W
擄C
擄C
2
1
4
6
8
10
ELECTRODE CONNECTION
2, 4, 6, 8 : Gate
3, 5, 7, 9 : Drain
1, 10
: Source
2.
V
DS
= 0
4.
4 circuits, T
C
= 25
擄C
The diode connected between the gate and source of the transistor serves as a protector against ESD. When
this device is actually used, an additional protection circuit is externally required if a voltage exceeding the rated
voltage may be applied to this device.
Document No. G10598EJ2V0DS00 (2nd edition)
Date Published December 1995 P
Printed in Japan
漏
10 MIN.
2.5
1995

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