5812-F
UCN5812EPF
SERIAL
DATA OUT
LOGIC
SUPPLY
LOAD
SUPPLY
OUT
20
SERIAL
DATA IN
OUT
19
OUT
1
BiMOS II 20-BIT SERIAL-INPUT, LATCHED
SOURCE DRIVERS WITH ACTIVE-DMOS PULL-DOWNS
The UCN5812AF/EPF combine a 20-bit CMOS shift register, data
latches, and control circuitry with high-voltage bipolar source drivers and
active DMOS pull-downs for reduced supply current requirements. Although
designed primarily for vacuum-fluorescent displays, the high-voltage, high-
current outputs also allow them to be used in other peripheral power driver
applications. They are improved versions of the original UCN5812A/EP.
25
24
REGISTER
REGISTER
LATCHES
LATCHES
Data Sheet
26182.26B
V
DD
28
V
BB
27
26
4
3
2
1
OUT
18
5
6
7
8
9
10
OUT
2
23
22
21
20
19
OUT
8
The CMOS shift register and latches allow direct interfacing with
microprocessor-based systems. With a 5 V supply, they will operate to at
least 3.3 MHz. At 12 V, higher speeds are possible. Especially useful for
inter-digit blanking, the BLANKING input disables the output source drives
and turns on the DMOS sink drivers. Use with TTL may require the use of
appropriate pull-up resistors to ensure an input logic high.
A CMOS serial data output enables cascade connections in applications
requiring additional drive lines. Similar devices are available as the
UCN5810AF/LWF (10 bits), UCN5811A (12 bits), and UCN5818AF/EPF
(32 bits).
The output source drivers are high-voltage pnp-npn Darlingtons with a
minimum breakdown of 60 V and are capable of sourcing up to 40 mA. The
DMOS active pull-downs are capable of sinking up to 15 mA.
The UCN5812AF is supplied in a 28-pin dual in-line plastic package with
0.600" (15.24 mm) row spacing. For surface mounting, the UCN5812EPF is
furnished in 28-lead plastic chip carrier (quad pack) with 0.050"(1.22 mm)
centers. Copper lead-frames, reduced supply current requirements and lower
output saturation voltages, allow continuous operation, with all outputs
sourcing 25 mA, of the UCN5812AF over the operating temperature range,
and the UCN5812EPF up to +75擄C. All devices are also available for opera-
tion between -40擄C and +85擄C. To order, change the prefix from 鈥楿CN鈥?to
鈥楿CQ鈥?
OUT
12
11
CLK
12
14
ST
17
OUT
10
13
15
OUT
11
16
BLANKING
GROUND
STROBE
CLOCK
OUT
9
18
Dwg. PP-059-1
ABSOLUTE MAXIMUM RATINGS
at T
A
= 25擄C
Logic Supply Voltage, V
DD
.....................
15 V
Driver Supply Voltage, V
BB
....................
60 V
Continuous Output Current Range,
I
OUT
.................................
-40 to +15 mA
Input Voltage Range,
V
IN
........................
-0.3 V to V
DD
+ 0.3 V
Package Power Dissipation, P
D
(UCN5812AF) ...........................
3.12 W*
(UCN5812EPF) ........................
1.92 W鈥?/div>
Operating Temperature Range,
T
A
..................................
-20
擄
C to +85
擄
C
Storage Temperature Range,
T
S
................................
-55
擄
C to +150
擄
C
* Derate at rate of 25 mW/擄C above T
A
= +25擄C
鈥?Derate at rate of 15 mW/擄C above T
A
= +25擄C
Caution: Allegro CMOS devices have input static
protection but are susceptible to damage when
exposed to extremely high static electrical
charges.
Note that the UCN5812AF (dual in-line package)
and UCN5812EPF (PLCC package) are electri-
cally identical and share a common terminal
number assignment.
FEATURES
I
I
I
I
I
High-Speed Source Drivers
I
Active DMOS Pull-Downs
60 V Source Outputs
I
Reduced Supply Current
To 3.3 MHz Data Input Rate
Requirements
Low Output-Saturation Voltages
I
Improved Replacement
Low-Power CMOS Logic and Latches
for TL5812
Always order by complete part number, e.g.,
UCN5812AF .
ALLEGRO
1
2
3
4
5
6
7
8
