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UC62WV0256-35 Datasheet

  • UC62WV0256-35

  • Low Power CMOS SRAM 32K X8 Bits

  • 425.36KB

  • 10頁(yè)

  • ETC

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Low Power CMOS SRAM
32K X8 Bits
Features:
鈥?Vcc operation voltage : 2.0V ~ 5.6V
鈥?Low power consumption :
15mA (Max.) operating current
2uA (Typ.) CMOS standby current
鈥?High Speed Access time :
35ns (Max) at Vcc = 2.7V
55ns (Max) at Vcc = 2.7V
70ns (Max.) at Vcc= 2.0V
鈥?Automatic power down when chip is deselected
鈥?Three state outputs and TTL compatible
鈥?Data retention supply voltage as low as 1.2V
鈥?Easy expansion with CE\ and OE\ options
UC62WV0256
-35/-55/-70
Description
The UC62WV0256 is a high performance, very low
power CMOS Static Random Access Memory organized as
32,768 words by 8 bits and operates from a wide range of
2.7V to 5.6V supply voltage. Advanced CMOS technology
and circuit techniques provide both high speed and low
power features with a typical CMOS standby current of 1uA
and maximum access time of 70ns in 2.0V operation.
Easy memory expansion is provided enable (CE), and
active LOW output enable (OE) and three-state output
drivers.
The UC62WV0256 has an automatic power down
feature, reducing the power consumption significantly when
chip is deselected.
The UC62WV0256 is available in the JEDEC standard 28 pin
330mil Plastic SOP, 300mil Plastic SOJ, 600mil Plastic DIP
and 8mmx13.4mm TSOP (normal type).
PRODUCT FAMILY
Product Family
UC62WV0256BC
UC62WV0256CC
UC62WV0256DC
UC62WV0256EC
UC62WV0256AC
UC62WV0256BI
UC62WV0256CI
UC62WV0256DI
UC62WV0256EI
UC62WV0256AI
Operating
Temperature
Vcc Range
Speed
(ns)
Vcc=2.7V
Power Consumption
VCC=5.6V
STANDBY
Operating(Max)
Vcc=5.0V
35ns
55ns
70ns
Package
Type
SOP-28
TSOP-28
PDIP-28
SOJ-28
DICE
SOP-28
TSOP-28
PDIP-28
SOJ-28
DICE
0鈩?~ 70鈩?/div>
2.0V ~ 5.6V
35/55/70
4uA
25mA
18mA
15mA
-25鈩?/div>
~ 85
2.0V ~ 5.6V
35/55/70
4uA
25mA
18mA
15mA
PIN CONFIGURATIONS
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
OE
A11
A9
A8
A13
WE
VCC
A14
A12
A7
A6
A5
A4
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
28
2
27
3
UC62WV0256BI
26
4
UC62WV0256DI
25
5
UC62WV0256EI
24
6
UC62WV0256BC
23
UC62WV0256DC
7
22
UC62WV0256EC
8
21
9
20
10
19
11
18
12
17
13
16
14
15
VCC
WE
A13
A8
A9
A11
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
GND
DQ2
DQ1
DQ0
A0
A1
A2
BLOCK DIAGRAM
ROW
DECODER
ROW
Address
ADDRESS INPUT
BUFFER
CE
WE
OE
A0 - A14
MEMORY ARRAY
32K X 8 Bits
COL
Address
COLUMN DECODER
CE
WE
OE
SENSE AMPLIFIER
&
WRITE DRIVER
CONTROL
INPUT
BUFFER
CONTROL
BLOCK
X8
I/O BUFFER
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
UC62WV0256CC
UC62WV0256CI
U-Chip Technology Corp. LTD.
Reserves the right to modify document contents without notice.
Revision 2.0
PAGE 1

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