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U2782B-AFSG3 Datasheet

  • U2782B-AFSG3

  • 1100 MHz Twin PLL

  • 10頁

  • TEMIC

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U2782B
1100 MHz Twin PLL
Description
The IC U2782B is a low power twin PLL manufactured
with TEMIC鈥檚 advanced UHF process. The maximum
operating frequency is 1100 MHz for both PLLs.
It features a wide supply voltage range from 2.7 to 5.5 V.
Prescaler 64/65 and power down function for both PLL鈥檚
is integrated. Applications are CT1, IS54, JDC etc.
Electrostatic sensitive device.
Observe precautions for handling.
Features
D
Very low current consumption (typical 3 V/11 mA)
D
Supply voltage range 2.7 to 5.5 V
D
Maximum input frequency: 1100 for both PLLs
D
2 pins for separate power down functions
D
Output for PLL lock status
D
Prescaler 64/65 for both inputs
D
SSO20 package
D
ESD protected according to MIL-STD 833
method 3015 cl.2
Benefits
D
Low current consumption leads to extended talk time
D
Twin PLL saves costs and space
D
One foot print for all TEMIC twin PLL鈥檚 saves design-
in time
Block Diagram
1
V
S
analog
V
S
digital
DGND
AGND
OSCi
OSCo
4
2
6
15
7
8
Oscillator
Control functions
16 bit latch
Lock
select
10
Lock Port2
Ports
Power
down Test
9
14
20
5I/Port 0
HPD1/Port1
HPD2/Port4
Port3
on / off
divide by 2
12 bit latch 1
12 bit reference divider 1
17 bit latch 1
Phase
detector 1
Charge
pump 1
3
17
CP1
V
Scp
RFi1
5
64 / 65 Prescaler 1
17 bit main divider 1
Clock
Data
Enable
11
3 bit
12
13
Load control
17 bit
Shift register
Pump
bias
19
Iset
12 bit latch 2
12 bit reference divider 2
17 bit latch 2
Phase
detector 2
Charge
pump 2
18
94 8916
CP2
RFi2
16
64 / 65 Prescaler 2
17 bit main divider 2
Figure 1.
TELEFUNKEN Semiconductors
Rev. A4, 17-Oct-97
1 (10)

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