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TSS463R Datasheet

  • TSS463R

  • Industrial Control IC

  • 54頁

  • ETC

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TSS463
Vehicle Area Network Data Link Controller
with Serial Interface
1. Description
The TSS463 is a circuit which allows the transfer of all
the status information needed in a car or truck over a
single low-cost wire pair, thereby minimizing the
electrical wire usage.
It can be used to interconnect powerful functions and to
control and interface car body electronics (lights,
wipers, power window...).
The TSS463 is fully compliant with the VAN ISO
standard ISO/11519-3. This standard supports a wide
range of applications such as low-cost remote controlled
switches, typically used for lamp control, up to complex,
highly autonomous, distributed systems which require
fast and secure data transfers.
The TSS463 is a microprocessor interfaced line
controller for mid to high complexity bus-masters and
listeners like dashboard controllers, car stereo or mobile
telephone CPUs.
The microprocessor interface consists of a 256 byte
RAM and register area divided into 11 control registers,
14 channel register sets and 128 bytes of general purpose
RAM, used as a message storage area, and a 6-source
maskable interrupt.
The circuit operates in the RAM using DMA techniques,
controlled by the channel and control registers. This
allows virtually any microprocessor including SPI/SCI
interface to be connected with ease with the TSS463.
Messages are encoded in enhanced Manchester code,
and an optional pulsed code for use with an optical or
radio link, at a maximum bit rate of 1 Mbit/s. The
TSS463 analyzes the messages received or transmitted
according to 6 different criteria including some higher
level checks.
In addition the bus interface has three separate inputs
with automatic source diagnosis and selection, allowing
for multibus listening or the automatic selection of the
most reliable source at any time if several line receivers
are connected to the same bus.
2. Features
D
D
D
D
D
D
D
D
D
Fully compliant to VAN specification ISO/11519鈥?.
Handles all specified module types.
Handles all specified message types.
Handles retransmission of frames on contention and
errors.
3 separate line inputs with automatic diagnosis and
selection.
Normal or pulsed (optical and radio mode) coding.
VAN transfer rate: 1 Mbit/s maximum.
SPI/SCI interface.
SPI transfer rate: 4 Mbit/s maximum.
SCI transfer rate: 125 Kbit/s maximum.
D
Idle and sleep modes.
D
128 bytes of general purpose RAM.
D
14 identifier registers with all bits individually
maskable.
D
6-source maskable interrupt including an
interrupt-on-reset to detect glitches on the reset pin.
D
Integrated crystal or resonator oscillator with
internal baud rate generator and buffered clock
output.
D
Single +5V power supply.
D
0.8
碌m
CMOS technology.
D
SO 16 packaging.
Rev. C 鈥?22 Feb. 01
1

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