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TSEV8308500GLZA2 Datasheet

  • TSEV8308500GLZA2

  • ADC 8-bit 500 Msps

  • 489.19KB

  • 50頁(yè)

  • ATMEL   ATMEL

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Main Features
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8-bit Resolution
500 Msps (min) Sampling Rate
Power Consumption: 3.8W Typ
500 mVpp Differential or Single-ended Analog Inputs
Differential or Single-ended 50鈩?ECL Compatible Clock Inputs
ECL or LVDS/HSTL Output Compatibility
ADC Gain Adjust
Data Ready Output with Asynchronous Reset
Gray or Binary Selectable Output Data; NRZ Output Mode
Enhanced CBGA Package with Ceramic Lid
Evaluation Board: TSEV8308500GL (Detailed Specification on Request)
Demultiplexer TS81102G0: Companion Device Available
ADC 8-bit
500 Msps
TS8308500
Performance
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1.3 GHz Full Power Input Bandwidth
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Band Flatness: 0.5 dB up to 500 MHz
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SINAD = 45 dB (7.2 Effective Bits), SFDR = 54 dBc
at F
S
= 500 Msps, F
IN
= 20 MHz
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SINAD = 43 dB (7.1 Effective Bits), SFDR = 53 dBc
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at F
S
= 500 Msps, F
IN
= 250 MHz
SINAD = 42 dB (7.0 Effective Bits), SFDR = 52 dBc
at F
S
= 500 Msps, F
IN
= 500 MHz (-3 dB FS)
2-tone IMD: TBD (199.5 MHz, 200.5 MHz) at 500 Msps
DNL = 鹵0.3 LSB INL = 鹵0.7 LSB
Low Bit Error Rate (10
-13
) at 500 Msps, Tj = 90擄C
Applications
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Digital Sampling Oscilloscopes
Satellite Receiver
Electronic Countermeasures/Electronic Warfare
Direct RF Down-conversion
Screening
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Atmel Standard Screening Level
Temperature Range:
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0擄C < Tc; Tj < +90擄C
-40擄C < Tc ; Tj < + 110擄C
Description
The TS8308500 is a monolithic 8-bit analog-to-digital converter, designed for digitizing
wide bandwidth analog signals at very high sampling rates of up to 500 Msps.
The TS8308500 is using an innovative architecture, including an on-chip Sample and
Hold (S/H), and is fabricated with an advanced high-speed bipolar process.
The on-chip S/H has a 1.3 GHz full power input bandwidth, providing excellent
dynamic performance in undersampling applications (High IF digitizing).
Rev. 2193A鈥揃DC鈥?6/03
2193A鈥揃DC鈥?4/03
1

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