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TSB21LV03CPM Datasheet

  • TSB21LV03CPM

  • IEEE 1394-1995 TRIPLE-CABLE TRANSCEIVER/ARBITER

  • 29頁(yè)

  • TI

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TSB21LV03C
IEEE 1394-1995 TRIPLE-CABLE TRANSCEIVER/ARBITER
SLLS331A 鈥?FEBRUARY 1999 鈥?REVISED OCTOBER 1999
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Fully Supports Provisions of IEEE
1394-1995 Standard for High Performance
Serial Bus
Fully Interoperable with FireWire鈩?and
i.LINK鈩?Implementation of IEEE 1394-1995
Provides Three Fully Compliant Cable
Ports at 100/200 Megabits per Second
(Mbits/s)
Cable Ports Monitor Line Conditions for
Active Connection to Remote Node
Device Power-Down Feature to Conserve
Energy in Battery-Powered Applications
Inactive Ports Disabled to Save Power
Logic Performs System Initialization and
Arbitration Functions
Encode and Decode Functions Included for
Data-Strobe Bit-Level Encoding
Incoming Data Resynchronized to Local
Clock
Single 3.3-V Supply Operation
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Interface to Link-Layer Controller Supports
Low Cost TI鈩?Bus-Holder Isolation
Data Interface to Link-Layer Controller
Provided Through 2/4 Parallel Lines at
49.152 MHz
Low Cost 24.576-MHz Crystal Oscillator
and PLL Provide Transmit/Receive Data at
100/200 Mbits/s, and Link-Layer Controller
Clock at 49.152 MHz
Interoperable with 1394 Link-Layer
Controllers Using 5-V Supplies
Interoperable Across 1394 Cable with 1394
Physical Layers (Phy) Using 5-V Supplies
Node Power-Class Information Signaling
for System Power Management
Cable Power Presence Monitoring
Separate Cable Bias and Driver Termination
Voltage Supply for Each Port
High Performance 64-Pin TQFP (PM)
Package and 68-Pin CFP (HV) Package
description
The TSB21LV03C provides the analog and digital physical layer functions needed to implement a three-port
node in a cable-based IEEE 1394-1995 network. Each cable port incorporates two differential line transceivers.
The transceivers include circuitry to monitor the line conditions as needed for determining connection status,
for initialization and arbitration, and for packet reception and transmission. The TSB21LV03C is designed to
interface with a link-layer controller (LLC), such as the TSB12LV21, TSB12LV31, TSB12C01, TSB12LV22,
TSB12LV41, or TSB12LV01.
The TSB21LV03C requires either an external 24.576-MHz crystal or crystal oscillator. The internal oscillator
drives an internal phase-locked loop (PLL), which generates the required 196.608-MHz reference signal. The
196.608-MHz reference signal is internally divided to provide the 49.152/98.304-MHz clock signals that control
transmission of the outbound encoded strobe and data information. The 49.152-MHz clock signal is also
supplied to the associated LLC for synchronization of the two chips and is used for resynchronization of the
received data. For the TSB21LV03C, the 49.152 MHz clock output is active when RESET is asserted low. The
power-down function, when enabled by taking the PD terminal high, stops operation of the PLL and disables
all circuitry except the cable-not-active signal circuitry.
The TSB21LV03C supports an optional isolation barrier between itself and its LLC. When ISO is tied high, the
link interface outputs behave normally. Also, when ISO is tied high, the internal bus hold function is enabled for
use with the TI Bus Holder isolation. TI bus holder isolation is implemented when ISO is tied high.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
FireWire is a trademark of Apple Computer, Incorporated.
i.LINK is a trademark of SONY.
TI is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
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1999, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
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