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TS87C51RD2-VIMD Datasheet

  • TS87C51RD2-VIMD

  • 8-Bit Microcontroller

  • 74頁

  • ETC

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TS80C51RA2/RD2
TS83C51RB2/RC2/RD2
TS87C51RB2/RC2/RD2
High Performance 8-bit Microcontrollers
1. Description
Atmel Wireless & Microcontrollers TS80C51Rx2 is high
performance CMOS ROM, OTP, EPROM and ROMless
versions of the 80C51 CMOS single chip 8-bit
microcontroller.
The TS80C51Rx2 retains all features of the 80C51 with
extended ROM/EPROM capacity (16/32/64 Kbytes), 256
bytes of internal RAM, a 7-source , 4-level interrupt
system, an on-chip oscilator and three timer/counters.
In addition, the TS80C51Rx2 has a Programmable
Counter Array, an XRAM of 256 or 768 bytes, a
Hardware Watchdog Timer, a more versatile serial
channel that facilitates multiprocessor communication
(EUART) and a X2 speed improvement mechanism.
The fully static design of the TS80C51Rx2 allows to
reduce system power consumption by bringing the clock
frequency down to any value, even DC, without loss of
data.
The TS80C51Rx2 has 2 software-selectable modes of
reduced activity for further reduction in power
consumption. In the idle mode the CPU is frozen while
the timers, the serial port and the interrupt system are still
operating. In the power-down mode the RAM is saved
and all other functions are inoperative.
2. Features
鈥?/div>
80C52 Compatible
鈥?/div>
8051 pin and instruction compatible
鈥?/div>
Four 8-bit I/O ports
鈥?/div>
Three 16-bit timer/counters
鈥?/div>
256 bytes scratchpad RAM
鈥?/div>
High-Speed Architecture
鈥?/div>
40 MHz @ 5V, 30MHz @ 3V
鈥?/div>
X2 Speed Improvement capability (6 clocks/
machine cycle)
30 MHz @ 5V, 20 MHz @ 3V (Equivalent to
60 MHz @ 5V, 40 MHz @ 3V)
鈥?/div>
Dual Data Pointer
鈥?/div>
Hardware Watchdog Timer (One-time enabled with
Reset-Out)
鈥?/div>
2 extra 8-bit I/O ports available on RD2 with high
pin count packages
鈥?/div>
Asynchronous port reset
鈥?/div>
Interrupt Structure with
鈥?/div>
7 Interrupt sources,
鈥?/div>
4 level priority interrupt system
鈥?/div>
Full duplex Enhanced UART
鈥?/div>
Framing error detection
鈥?/div>
Automatic address recognition
鈥?/div>
Low EMI (inhibit ALE)
鈥?/div>
On-chip ROM/EPROM (16K-bytes, 32K-bytes, 64K-
bytes)
鈥?/div>
Power Control modes
鈥?/div>
Idle mode
鈥?/div>
Power-down mode
鈥?/div>
Power-off Flag
鈥?/div>
Once mode (On-chip Emulation)
鈥?/div>
On-chip eXpanded RAM (XRAM) (256 or 768 bytes)
鈥?/div>
Programmable Clock Out and Up/Down Timer/
Counter 2
鈥?/div>
Programmable Counter Array with
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
High Speed Output,
Compare / Capture,
Pulse Width Modulator,
Watchdog Timer Capabilities
鈥?/div>
Power supply: 4.5-5V, 2.7-5.5V
鈥?/div>
Temperature ranges: Commercial (0 to 70
o
C) and
Industrial (-40 to 85
o
C)
鈥?/div>
Packages: PDIL40, PLCC44, VQFP44 1.4, CQPJ44
(window), CDIL40 (window), PLCC68, VQFP64
1.4, JLCC68 (window)
Rev. C - 06 March, 2001
1

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