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TS68302MR1B/T16 Datasheet

  • TS68302MR1B/T16

  • Integrated Multiprotocol Processor IMP

  • 1143.96KB

  • 47頁

  • ATMEL   ATMEL

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Features
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TS68000/TS68008 Microprocessor Core Supporting a 16- or 8-bit TS68000 Family
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System Integration Block Including:
Independent Direct Memory Access (IDMA) Controller
Interrupt Controller with Two Modes of Operation
Parallel Input/output (I/O) Ports, some with Interrupt Capability
On-chip Usable 1152 bytes of Dual-port Random-access Memory (RAM)
Three Timers, including a Watchdog Timer
Four Programmable Chip-select Lines with Wait-state Logic
Programmable Address Mapping of Dual-port RAM and IMP Registers
On-chip Clock Generator with an Output Clock Signal
System Control:
System Control Register
Bus Arbitration Logic with Low Interrupt Latency Support
Hardware Watchdog for Monitoring Bus Activity
Low Power (Standby) Modes
Disable CPU Logic (TS68000)
Freeze Control for Debugging Selected On-chip Peripherals
DRAM Refresh Controller
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Communications Processor Including:
鈥?Main Controller (RISC Processor)
鈥?Three Full-duplex Serial Communication Controllers (SCCs)
鈥?Six Serial Direct Memory Access (SDMA) Channels Dedicated to the Three SCCs
鈥?Flexible Physical Interface Accessible by SCCs for Interchip Digital Link (IDL)
General Circuit Interface (GCI, see note), Pulse Code Modulation (PCM), and
Nonmultiplexed Serial Interface (NMSI) Operation
鈥?Serial Communication Port (SCP) for Synchronous Communication, Clock Rate up
to 4.096 MHz
鈥?Serial Management Controllers (SMCs) for IDL and GCI Channels
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Frequency of Operation: 16.67 MHz
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Power Supply: 5 V
DC
鹵 10%
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Integrated
Multiprotocol
Processor (IMP)
TS68302
Description
The IMP is a very large-scale integration (VLSI) device incorporating the main building
blocks needed for the design of a wide variety of controllers. The device is especially
suitable to applications in the communications industry. The IMP is the first device to
offer the benefits of a closely coupled, industry-standard, TS68000/TS68008 micro-
processor core and a flexible communications architecture. This multichannel
communications device may be configured to support a number of popular industry
interfaces, including those for the integrated services digital network (ISDN) basic rate
and terminal adapter applications. Through a combination of architectural and pro-
grammable features, concurrent operation of different protocols is easily achieved
using the IMP. Data concentrators, line cards, bridges, and gateways are examples of
suitable applications for this versatile device.
The IMP is a high-density complementary metal-oxide semiconductor (HCMOS)
device consisting of a TS68000/TS68008 microprocessor core, a system integration
block (SIB), and a communications processor (CP). The TS68302 block diagram is
shown in Figure 1.
Note:
GCI is sometimes referred to as IOM2.
Rev. 2117A鈥揌IREL鈥?1/02
1

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