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TPIC6B273DW Datasheet

  • TPIC6B273DW

  • POWER LOGIC OCTAL D-TYPE LATCH

  • 9頁

  • TI

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TPIC6B273
POWER LOGIC OCTAL D-TYPE LATCH
SLIS031 鈥?APRIL 1994 鈥?REVISED JULY 1995
D
D
D
D
D
D
Low r
DS(on)
. . . 5
鈩?/div>
Typical
Avalanche Energy . . . 30 mJ
Eight Power DMOS-Transistor Outputs of
150-mA Continuous Current
500-mA Typical Current-Limiting Capability
Output Clamp Voltage . . . 50 V
Low Power Consumption
DW OR N PACKAGE
(TOP VIEW)
description
The TPIC6B273 is a monolithic, high-voltage,
medium-current, power logic octal D-type latch
with DMOS-transistor outputs designed for use in
systems that require relatively high load power.
The device contains a built-in voltage clamp on
the outputs for inductive transient protection.
Power driver applications include relays, sole-
noids, and other medium-current or high-voltage
loads.
The TPIC6B273 contains eight positive-edge-
triggered D-type flip-flops with a direct clear input.
Each flip-flop features an open-drain power
DMOS-transistor output.
When clear (CLR) is high, information at the D
inputs meeting the setup time requirements is
transferred to the DRAIN outputs on the positive-
going edge of the clock (CLK) pulse. Clock
triggering occurs at a particular voltage level and
is not directly related to the transition time of the
positive-going pulse. When the clock input (CLK)
is at either the high or low level, the D input signal
has no effect at the output. An asynchronous CLR
is provided to turn all eight DMOS-transistor
outputs off. When data is low for a given output,
the DMOS-transistor output is off. When data is
high, the DMOS-transistor output has sink-current
capability.
Outputs are low-side, open-drain DMOS
transistors with output ratings of 50 V and 150-mA
continuous sink-current capability. Each output
provides a 500-mA typical current limit at
T
C
= 25擄C. The current limit decreases as the
junction temperature increases for additional
device protection.
CLR
D1
D2
DRAIN1
DRAIN2
DRAIN3
DRAIN4
D3
D4
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
D8
D7
DRAIN8
DRAIN7
DRAIN6
DRAIN5
D6
D5
CLK
logic symbol
鈥?/div>
CLR
CLK
D1
D2
D3
D4
D5
D6
D7
D8
1
11
2
3
8
9
12
13
18
19
R
C1
1D
4
5
6
7
14
15
16
17
DRAIN1
DRAIN2
DRAIN3
DRAIN4
DRAIN5
DRAIN6
DRAIN7
DRAIN8
鈥?This symbol is in accordance with ANSI/IEEE Standard 91-1984
and IEC Publication 617-12.
FUNCTION TABLE
(each channel)
INPUTS
CLR
L
H
H
H
CLK
X
鈫?/div>
鈫?/div>
L
D
X
H
L
X
OUTPUT
DRAIN
H
L
H
Latched
H = high level, L = low level, X = irrelevant
The TPIC6B273 is characterized for operation over the operating case temperature range of 鈥?40擄C to 125擄C.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
1997, Texas Instruments Incorporated
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
1

TPIC6B273DW 產(chǎn)品屬性

  • 25

  • 集成電路 (IC)

  • 邏輯 - 鎖銷

  • TPIC

  • D 型鎖存器

  • 8:8

  • 標(biāo)準(zhǔn)

  • 4.5 V ~ 5.5 V

  • 1

  • 150ns

  • -

  • -40°C ~ 125°C

  • 表面貼裝

  • 20-SOIC(0.295",7.50mm 寬)

  • 20-SOIC

  • 管件

  • 296-1350-5

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