1.5鈩?/div>
MIL visual screening available
7
Low Threshold DMOS Technology
These low threshold enhancement-mode (normally-off) transis-
tors utilize a vertical DMOS structure and Supertex's well-proven
silicon-gate manufacturing process. This combination produces
devices with the power handling capabilities of bipolar transistors
and with the high input impedance and positive temperature
coefficient inherent in MOS devices. Characteristic of all MOS
structures, these devices are free from thermal runaway and
thermally-induced secondary breakdown.
Supertex鈥檚 vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where very low threshold
voltage, high breakdown voltage, high input impedance, low input
capacitance, and fast switching speeds are desired.
Features
s
Low threshold 鈥?2.0V max.
s
High input impedance
s
Low input capacitance 鈥?100pF typical
s
Fast switching speeds
s
Low on resistance
s
Free from secondary breakdown
s
Low input and output leakage
s
Complementary N- and P-channel devices
Applications
s
Logic level interfaces 鈥?ideal for TTL and CMOS
s
Solid state relays
s
Battery operated systems
s
Photo voltaic drives
s
Analog switches
s
General purpose line drivers
s
Telecom switches
Package Options
Absolute Maximum Ratings
Drain-to-Source Voltage
Drain-to-Gate Voltage
Gate-to-Source Voltage
Operating and Storage Temperature
Soldering Temperature*
*
Distance of 1.6 mm from case for 10 seconds.
7-51
BV
DSS
BV
DGS
鹵
20V
-55擄C to +150擄C
300擄C
G
D
S
SGD
TO-220
TAB: DRAIN
TO-92
Note:
1. See Package Outline section for dimensions
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