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TMS418169P-60 Datasheet

  • TMS418169P-60

  • 1048576-WORD BY 16-BIT EXTENDED DATA OUT HIGH-SPEED DRAMS

  • 1462.68KB

  • 67頁(yè)

  • TI

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TMS55160, TMS55161, TMS55170, TMS55171
262144 BY 16-BIT MULTIPORT VIDEO RAMS
SMVS464 鈥?MARCH1996
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Organization:
DRAM: 262 144 Words
脳
16 Bits
SAM: 256 Words
脳
16 Bits
Single 5.0-V Power Supply (鹵10%)
Dual-Port Accessibility 鈥?Simultaneous and
Asynchronous Access From the DRAM and
Serial-Address-Memory (SAM) Ports
Write-per-Bit Function for Selective Write to
Each I/O of the DRAM Port
Byte-Write Function for Selective Write to
Lower Byte (DQ0 鈥?DQ7) or Upper Byte
(DQ8鈥?DQ15) of the DRAM Port
4 - Column or 8 - Column Block - Write
Function for Fast Area - Fill Operations
Enhanced Page Mode for Faster Access
With Extended-Data-Output (EDO) Option
for Faster System Cycle Time
CAS-Before-RAS (CBR) and Hidden
Refresh Functions
Long Refresh Period 鈥?Every 8 ms
(Maximum)
Full - Register- Transfer Function Transfers
Data from the DRAM to the Serial Register
D
D
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Split-Register-Transfer Function Transfers
Data from the DRAM to One-Half of the
Serial Register While the Other Half is
Outputing Data to the SAM Port
256 Selectable Serial Register Starting
Points
Programmable Split-Register Stop Point
Up to 55-MHz Uninterrupted Serial-Data
Streams
3-State Serial Outputs for Easy Multiplexing
of Video Data Streams
All Inputs/Outputs and Clocks TTL
Compatible
Compatible With JEDEC Standards
Designed to Work With the Texas
Instruments (TI錚? Graphics Family
Fabricated Using TI鈥檚 Enhanced
Performance Implanted CMOS (EPIC錚?
Process
performance ranges
ACCESS TIME
ROW ENABLE
tRAC
(MAX)
鈥?60 Speed
鈥?70 Speed
60 ns
70 ns
ACCESS TIME
SERIAL DATA
tSCA
(MIN)
15 ns
20 ns
DRAM PAGE
CYCLE TIME
tPC
(MIN)
35 ns
40 ns
DRAM EDO
CYCLE TIME
tPC
(MIN)
30 ns
30 ns
SERIAL
CYCLE TIME
tSCC
(MIN)
18 ns
22 ns
OPERATING CURRENT
SERIAL PORT STANDBY
lCC1
(MAX)
180 mA
165 mA
Table 1. Device Option Table
DEVICE
55160
55161
55170
55171
POWER SUPPLY VOLTAGE
5.0 V
鹵
0.5 V
5.0 V
鹵
0.5 V
5.0 V
鹵
0.5 V
5.0 V
鹵
0.5 V
BLOCK-WRITE CAPABILITY
4 -column
4 -column
8 - column
8 - column
PAGE / EDO OPERATION
Page
EDO
Page
EDO
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TI and EPIC are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
錚?/div>
1996, Texas Instruments Incorporated
POST OFFICE BOX 1443
鈥?/div>
HOUSTON, TEXAS 77251鈥?443
1

TMS418169P-60相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
    廠商
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  • 英文版
    9 X 64 DIGITAL STORAGE BUFFER (FIFO)
    TI
  • 英文版
    9 X 64 DIGITAL STORAGE BUFFER (FIFO)
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    16,384-BIT DYNAMIC RANDOM-ACCESS MEMORY
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    GRAPHICS SYSTEM PROCESSOR
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    262,144-BIT DYNAMIC RANDOM-ACCESS MEMORIES
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    16,384 WORD BY 4 BIT DYNAMIC RAM
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  • 英文版
    16,384 WORD BY 4 BIT DYNAMIC RAM
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    GRAPHICS SYSTEM PROCESSOR
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  • 英文版
    GRAPHICS SYSTEM PROCESSOR
    TI [Texas ...
  • 英文版
    262,144-BIT DYNAMIC RANDOM-ACCESS MEMORIES
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  • 英文版
    262,144-BIT DYNAMIC RANDOM-ACCESS MEMORIES
    TI [Texas ...
  • 英文版
    262,144-BIT DYNAMIC RANDOM-ACCESS MEMORIES
    TI
  • 英文版
    262,144-BIT DYNAMIC RANDOM-ACCESS MEMORIES
    TI [Texas ...
  • 英文版
    4194304-WORD BY 1-BIT DYNAMIC RANDOM-ACCESS MEMORIES
    TI
  • 英文版
    4194304-WORD BY 1-BIT DYNAMIC RANDOM-ACCESS MEMORIES
    TI [Texas ...
  • 英文版
    1048576-WORD BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORIES
    TI

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