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SE370C777AJNT Datasheet

  • SE370C777AJNT

  • 8-Bit Microcontroller

  • 870.30KB

  • 59頁

  • ETC

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TMS370Cx7x
8-BIT MICROCONTROLLER
SPNS034C 鈥?SEPTEMBER 1995 鈥?REVISED FEBRUARY 1997
D
D
D
D
D
D
D
D
D
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Real-Time In-Circuit Emulation
Extensive Breakpoint / Trace Capability
Software Performance Analysis
Multi-Window User Interface
Microcontroller Programmer
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
漏
1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 1443
鈥?/div>
HOUSTON, TEXAS 77251鈥?443
T2AIC1/CR
G0
G1
G2
XTAL2/CLKIN
XTAL1
V CC1
V CC3
V SS3
AN0 / E0
AN1 / E1
AN2 / E2
AN3 / E3
AN4 / E4
AN5 / E5
AN6 / E6
AN7 / E7
D
CMOS/EEPROM/EPROM Technologies on a
Single Device
鈥?Mask-ROM Devices for High-Volume
Production
鈥?One-Time-Programmable (OTP) EPROM
Devices for Low-Volume Production
鈥?Reprogrammable EPROM Devices for
Prototyping Purposes
Internal System Memory Configurations
鈥?On-Chip Program Memory Versions
鈥?ROM: 24K Bytes
鈥?EPROM: 24K Bytes
鈥?Data EEPROM: 256 Bytes
鈥?Static RAM: 512 Bytes
Flexible Operating Features
鈥?Low-Power Modes: STANDBY and HALT
鈥?Commercial, Industrial, and Automotive
Temperature Ranges
鈥?Clock Options:
鈥?Divide-by-4 (0.5 MHz 鈥?5 MHz SYSCLK)
鈥?Divide-by-1 (2 MHz 鈥?5 MHz SYSCLK)
Phase-Locked Loop (PLL)
鈥?Supply Voltage (V
CC
): 5 V
鹵
10%
Eight-Channel 8-Bit Analog-to-Digital
Converter 1 (ADC1)
TMS370 Series Compatibility
鈥?Instructions Upwardly Compatible With
All TMS370 Devices
鈥?Register-to-Register Architecture
鈥?256 General-Purpose Registers
鈥?14 Powerful Addressing Modes
Two 16-Bit General-Purpose Timers
On-Chip 24-Bit Watchdog Timer
Flexible Interrupt Handling
CMOS/Package /TTL-Compatible I / O Pins
鈥?64-Pin Plastic and Ceramic Shrink
Dual-In-Line Packages / 44 Bidirectional,
9 Input Pins
鈥?68-Pin Plastic and Ceramic Leaded Chip
Carrier Packages / 46 Bidirectional,
9 Input Pins
鈥?All Peripheral Function Pins Are
Software Configurable for Digital I / O
Workstation/PC-Based Software
Development System
鈥?C Compiler and C Source Debugger
FN / FZ PACKAGE
( TOP VIEW )
VSS1
C2
C1
MC
C0
B7
B6
B5
B4
B3
B2
B1
B0
D0
VCC2
VSS2
VCC1
C3
C4
C5
C6
C7
V
CC2
V
SS2
A0
A1
A2
A3
A4
A5
A6
A7
T2AEVT
T2AIC2/PWM
10
11
12
13
14
15
16
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
60
59
58
57
56
55
54
17
53
18
52
19
51
20
50
21
49
22
48
23
47
24
46
25
45
26
44
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
D1
D2
D3/SYSCLK
D4
D5
D6
D7
RESET
INT1 / NMI
INT2
INT3
G5
G4
G3
T1IC/CR
T1PWM
T1EVT
JN / NM PACKAGE
( TOP VIEW )
B5
B6
B7
C0
MC
C1
C2
V
SS1
C3
C4
C5
C6
C7
AN0 / E0
A0
A1
A2
A3
A4
A5
A6
A7
T2AEVT
T2AIC2 / PWM
T2AIC1 / CR
G0
G1
G2
XTAL2 / CLKIN
XTAL1
V
CC1
V
CC3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
B4
B3
B2
B1
B0
D0
V
SS1
V
CC1
D1
D3/SYSCLK
D4
D6
D7
RESET
INT1 / NMI
INT2
INT3
G5
G4
G3
T1IC / CR
T1PWM
AN7 / E7
T1EVT
V
SS1
AN6 / E6
AN5 / E5
AN4 / E4
AN3 / E3
AN2 / E2
AN1 / E1
V
SS3
1

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