TMS320C542 Datasheet

IC型號(hào)：
TMS320C542
PDF描述：
FIXED-POINT DIGITAL SIGNAL PROCESSORS
文件大?。?/label>
1421.14KB
PDF頁(yè)數(shù)：
111頁(yè)
芯片廠家：
TI

閱覽下載糾錯(cuò) 0

掃碼查看芯片數(shù)據(jù)手冊(cè)

上傳產(chǎn)品規(guī)格書(shū)

PDF預(yù)覽

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111

TMS320C54x, TMS320LC54x, TMS320VC54x

FIXED-POINT DIGITAL SIGNAL PROCESSORS

SPRS039C 鈥?FEBRUARY 1996 鈥?REVISED DECEMBER 1999

Advanced Multibus Architecture With Three

Separate 16-Bit Data Memory Buses and

One Program Memory Bus

40-Bit Arithmetic Logic Unit (ALU)

Including a 40-Bit Barrel Shifter and Two

Independent 40-Bit Accumulators

17-

脳

17-Bit Parallel Multiplier Coupled to a

40-Bit Dedicated Adder for Non-Pipelined

Single-Cycle Multiply/Accumulate (MAC)

Operation

Compare, Select, and Store Unit (CSSU) for

the Add/Compare Selection of the Viterbi

Operator

Exponent Encoder to Compute an

Exponent Value of a 40-Bit Accumulator

Value in a Single Cycle

Two Address Generators With Eight

Auxiliary Registers and Two Auxiliary

Data Bus With a Bus Holder Feature

Address Bus With a Bus Holder Feature

(鈥?48 and 鈥?49 Only)

Extended Addressing Mode for 8M

脳

16-Bit

Maximum Addressable External Program

Space (鈥?48 and 鈥?49 Only)

192K

脳

16-Bit Maximum Addressable

Memory Space (64K Words Program,

64K Words Data, and 64K Words I/O)

On-Chip ROM with Some Configurable to

Program/Data Memory

Dual-Access On-Chip RAM

Single-Access On-Chip RAM (鈥?48/鈥?49)

Single-Instruction Repeat and

Block-Repeat Operations for Program Code

Block-Memory-Move Instructions for Better

Program and Data Management

Instructions With a 32-Bit Long Word

Operand

Instructions With Two- or Three-Operand

Reads

Arithmetic Instructions With Parallel Store

and Parallel Load

Conditional Store Instructions

Fast Return From Interrupt

On-Chip Peripherals

鈥?Software-Programmable Wait-State

Generator and Programmable Bank

Switching

鈥?On-Chip Phase-Locked Loop (PLL) Clock

Generator With Internal Oscillator or

External Clock Source

鈥?Full-Duplex Serial Port to Support 8- or

16-Bit Transfers (鈥?41, 鈥橪C545, and

鈥橪C546 Only)

鈥?Time-Division Multiplexed (TDM) Serial

Port (鈥?42, 鈥?43, 鈥?48, and 鈥?49 Only)

鈥?Buffered Serial Port (BSP) (鈥?42, 鈥?43,

鈥橪C545, 鈥橪C546, 鈥?48, and 鈥?49 Only)

鈥?8-Bit Parallel Host-Port Interface (HPI)

(鈥?42, 鈥橪C545, 鈥?48, and 鈥?49)

鈥?One 16-Bit Timer

鈥?External-Input/Output (XIO) Off Control

to Disable the External Data Bus,

Address Bus and Control Signals

Power Consumption Control With IDLE1,

IDLE2, and IDLE3 Instructions With

Power-Down Modes

CLKOUT Off Control to Disable CLKOUT

On-Chip Scan-Based Emulation Logic,

IEEE Std 1149.1

鈥?/div>

(JTAG) Boundary Scan

Logic

25-ns Single-Cycle Fixed-Point Instruction

Execution Time [40 MIPS] for 5-V Power

Supply (鈥機(jī)541 and 鈥機(jī)542 Only)

20-ns and 25-ns Single-Cycle Fixed-Point

Instruction Execution Time (50 MIPS and

40 MIPS) for 3.3-V Power Supply (鈥橪C54x)

15-ns Single-Cycle Fixed-Point Instruction

Execution Time (66 MIPS) for 3.3-V Power

Supply (鈥橪C54xA, 鈥?48, 鈥橪C549)

12.5-ns Single-Cycle Fixed-Point

Instruction Execution Time (80 MIPS) for

3.3-V Power Supply (鈥橪C548, 鈥橪C549)

10-ns and 8.3-ns Single-Cycle Fixed-Point

Instruction Execution Time (100 and 120

MIPS) for 3.3-V Power Supply (2.5-V Core)

(鈥橵C549)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

鈥?IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

漏

1999, Texas Instruments Incorporated

POST OFFICE BOX 1443

鈥?/div>

HOUSTON, TEXAS 77251鈥?443

型號(hào)

版本

描述

廠商

下載
TMS320

英文版

SECOND-GENERATION DIGITAL SIGNAL PROCESSORS

TI

TMS320
TMS320

英文版

SECOND-GENERATION DIGITAL SIGNAL PROCESSORS

TI [Texas ...

TMS320
TMS340

英文版

GRAPHICS SYSTEM PROCESSOR

TI

TMS340
TMS340

英文版

Graphics Library

TMS340
TMS340

英文版

C Source Debugger User Guide

TMS340
TMS370

英文版

RADIO FREQUENCY I DENTIFICATION SYSTEMS

TI

TMS370
TMS370

英文版

Family Simulator Getting Started Guide

TMS370
TMS370

英文版

Programming Tool Getting Started Guide

TMS370
TMS370

英文版

Microcontroller Family User抯 Guide

TMS370
TMS370

英文版

C Source Debugger User Guide

TMS370
TMS370

英文版

Microcontroller/Gang Programmer

TMS370
TMS3000

英文版

DUAL 25-BIT STATIC SHIFT REGISTER

TI [Texas ...

TMS3000
TMS3001

英文版

DUAL 25-BIT STATIC SHIFT REGISTER

TI [Texas ...

TMS3001
TMS3120

英文版

QUADRUPLE 80-, 64-BIT STATIC SHIFT REGISTERS

TI

TMS3120
TMS3120

英文版

QUADRUPLE 80-, 64-BIT STATIC SHIFT REGISTERS

TI [Texas ...

TMS3120
TMS3121

英文版

QUADRUPLE 80-, 64-BIT STATIC SHIFT REGISTERS

TI

TMS3121
TMS3121

英文版

QUADRUPLE 80-, 64-BIT STATIC SHIFT REGISTERS

TI [Texas ...

TMS3121
TMS3122

英文版

HEX 32-BIT STATIC SHIFT REGISTERS

TI

TMS3122
TMS3122

英文版

HEX 32-BIT STATIC SHIFT REGISTERS

TI [Texas ...

TMS3122
TMS3123

英文版

HEX 32-BIT STATIC SHIFT REGISTERS

TI

TMS3123

TMS320C542 Datasheet

PDF預(yù)覽

TMS320C542相關(guān)型號(hào)PDF文件下載

您可能感興趣的PDF文件資料

熱門(mén)IC型號(hào)推薦

TMS320C542 Datasheet

PDF預(yù)覽

TMS320C542相關(guān)型號(hào)PDF文件下載

您可能感興趣的PDF文件資料

熱門(mén)IC型號(hào)推薦

建議反饋

PDF糾錯(cuò)X