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TMS29F008B-80BDCDQ Datasheet

  • TMS29F008B-80BDCDQ

  • x8 Flash EEPROM

  • 44頁

  • ETC

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TMS29F008T, TMS29F008B
1048576 BY 8-BIT
FLASH MEMORIES
D
D
D
D
D
D
D
D
D
D
Single Power Supply Supports 5 V 10%
Read/Write Operation
Organization . . . 1 048576 By 8 Bits
Array-Blocking Architecture
鈥?One 16K-Byte Boot Sector
鈥?Two 8K-Byte Parameter Sectors
鈥?One 32K-Byte Sector
鈥?Fifteen 64K-Byte Sectors
鈥?Any Combination of Sectors Can Be
Erased. Supports Full-Chip Erase
鈥?Any Combination of Sectors Can Be
Marked as Read-Only
Boot-Code Sector Architecture
鈥?T = Top Sector
鈥?B = Bottom Sector
Sector Protection
鈥?Hardware Protection Method That
Disables Any Combination of Sectors
From Write or Erase Operations Using
Standard Programming Equipment
Embedded Program/Erase Algorithms
鈥?Automatically Pre-Programs and Erases
Any Sector
鈥?Automatically Programs and Verifies the
Program Data at Specified Address
JEDEC Standards
鈥?Compatible With JEDEC Byte Pinouts
鈥?Compatible With JEDEC EEPROM
Command Set
Fully Automated On-Chip Erase and
Program Operations
100 000 Program/Erase Cycles
Low Power Dissipation
鈥?40-mA Typical Active Read for Byte Mode
鈥?60-mA Typical Program/Erase Current
鈥?Less Than 100-碌A(chǔ) Standby Current
鈥?5
碌A(chǔ)
in Deep Power-Down Mode
"
SMJS845A 鈥?MARCH 1997 鈥?REVISED OCTOBER 1997
D
D
D
D
D
D
PIN NOMENCLATURE
A[0 :19]
DQ[0 :7]
CE
OE
NC
RESET
RY / BY
VCC
VSS
WE
Address Inputs
Data In / Data out
Chip Enable
Output Enable
No Internal Connection
Reset / Deep Power Down
Ready / Busy Output
Power Supply
Ground
Write Enable
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
漏
1997, Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
POST OFFICE BOX 1443
Powered by ICminer.com Electronic-Library Service CopyRight 2003
鈥?/div>
HOUSTON, TEXAS 77251鈥?443
1
PRODUCT PREVIEW
All Inputs/Outputs TTL-Compatible
Erase Suspend/Resume
鈥?Supports Reading Data From, or
Programming Data to, a Sector Not
Being Erased
Hardware-Reset Pin Initializes the
Internal-State Machine to the Read
Operation
40-Pin Thin Small-Outline Package (TSOP)
(DCD Suffix)
Detection Of Program/Erase Operation
鈥?Data Polling and Toggle Bit Feature of
Program/Erase Cycle Completion
鈥?Hardware Method for Detection of
Program/Erase Cycle Completion
Through Ready/Busy (RY/BY) Output Pin
High-Speed Data Access at 5-V V
CC
10%
at Three Temperature Ranges
鈥?80 ns Commercial . . . 0擄C to 70擄C
鈥?90 ns Commercial . . . 0擄C to 70擄C
鈥?100 ns Extended . . . 鈥?0擄C to 85擄C
鈥?120 ns Automotive . . . 鈥?0擄C to 125擄C
"

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