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TMS28F800AXY Datasheet

  • TMS28F800AXY

  • 1 048 576 BY 8-BIT/524 288 BY 16-BIT AUTO-SELECT BOOT-BLOCK ...

  • 52頁

  • TI

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TMS28F008Axy,TMS28F800Axy
1 048 576 BY 8-BIT/524 288 BY 16-BIT
AUTO-SELECT BOOT-BLOCK FLASH MEMORIES
SMJS851A 鈥?NOVEMBER 1997 鈥?REVISED MARCH 1998
D
D
Organization . . .
D
D
D
D
D
D
D
D
1 048 576 By 8 Bits
524 288 By 16 Bits
Array-Blocking Architecture
鈥?Two 8K-Byte/4K-Word Parameter Blocks
鈥?One 96K-Byte/48K-Word Main Block
鈥?Seven 128K-Byte/64K-Word Main Blocks
鈥?One 16K-Byte/8K-Word Protected Boot
Block
鈥?Top or Bottom Boot Locations
All Inputs / Outputs TTL-Compatible
Maximum Access / Minimum Cycle Time
5-V V
CC
3-V V
CC
鈥?8F008Axy70 70 ns
100 ns
鈥?8F008Axy80 80 ns
120 ns
鈥?8F800Axy70 70 ns
100 ns
鈥?8F800Axy80 80 ns
120 ns
(See Table 1 for V
CC
/V
PP
Voltage
Configuration)
100 000- and 10 000-Program/ Erase Cycle
Versions
Three Temperature Ranges
鈥?Commercial . . . 0擄C to 70擄C
鈥?Extended . . . 鈥?40擄C to 85擄C
鈥?Automotive . . . 鈥?40擄C to 125擄C
Embedded Program/Erase Algorithms
鈥?Automated Byte Programming
鈥?Automated Word Programming
鈥?Automated Block Erase
鈥?Erase Suspend/Erase Resume
Automatic Power-Saving Mode
JEDEC Standards Compatible
鈥?Compatible With JEDEC Byte/Word
Pinouts
鈥?Compatible With JEDEC EEPROM
Command Set
Fully Automated On-Chip Erase and
Byte / Word Program Operations
D
D
D
D
D
Package Options
鈥?44-Pin Plastic Small-Outline Package
(PSOP) (DBJ Suffix)
鈥?40-Pin Thin Small-Outline Package
(TSOP) (DCD Suffix)
鈥?48-Pin TSOP (DCD Suffix)
鈥?48-Ball Micro Ball Grid Array
(碌BGA
t
) available
Low Power Dissipation ( V
CC
= 5.5 V )
鈥?Active Write . . . 330 mW ( Byte Write)
鈥?Active Read . . . 220 mW ( Byte Read)
鈥?Active Write . . . 330 mW ( Word Write)
鈥?Active Read . . . 275 mW ( Word Read)
鈥?Block Erase . . . 330 mW
鈥?Standby . . . 0.55 mW (CMOS-Input
Levels)
鈥?Deep Power-Down Mode . . . 0.044 mW
Write-Protection for Boot Block
Industry Standard Command-State Machine
(CSM)
鈥?Erase Suspend/Resume
鈥?Algorithm-Selection Identifier
Flexible V
PP
/Supply Voltage Combination
PIN NOMENCLATURE
A0 鈥?A18
A0 鈥?A19
BYTE
DQ0 鈥?DQ14
DQ15/A 鈥?
CE
OE
NC
RP
VCC
VPP
VSS
WE
WP
Address Inputs
Address Inputs (for 40-pin TSOP only)
Byte Enable
Data In / Out
Data In / Out (word-wide mode),
Low-Order Address (byte-wide mode)
Chip Enable
Output Enable
No Internal Connection
Reset / Deep Power Down
Power Supply
Power Supply for Program / Erase
Ground
Write Enable
Write Protect (for 40-pin and 48-pin
TSOP only)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
碌BGA
is a trademark of Tessera, Inc.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
漏
1998, Texas Instruments Incorporated
POST OFFICE BOX 1443
鈥?/div>
HOUSTON, TEXAS 77251鈥?443
1

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