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TMS28F400BZB90BDBJE Datasheet

  • TMS28F400BZB90BDBJE

  • 8-BIT/262144 BY 16-BIT BOOT-BLOCK FLASH MEMORIES

  • 29頁

  • TI

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TMS28F400BZT, TMS28F400BZB
524288 BY 8-BIT/262144 BY 16-BIT
BOOT-BLOCK FLASH MEMORIES
SMJS400E 鈥?JUNE 1994 鈥?REVISED JANUARY 1998
D
D
Organization . . .
D
D
D
D
D
D
D
D
524 288 by 8 Bits
262 144 by 16 Bits
Array-Blocking Architecture
鈥?Two 8K-Byte Parameter Blocks
鈥?One 96K-Byte Main Block
鈥?Three 128K-Byte Main Blocks
鈥?One 16K-Byte Protected Boot Block
鈥?Top or Bottom Boot Locations
All Inputs / Outputs TTL Compatible
Maximum Access/Minimum Cycle Time
V
CC
鹵
10%
鈥?8F400BZx80
80 ns
鈥?8F400BZx90
90 ns
(x = top (T) or bottom (B) boot-block
configuration ordered)
10 000 Program/Erase-Cycles
Two Temperature Ranges
鈥?Commercial . . . 0擄C to 70擄C
鈥?Extended . . . 鈥?40擄C to 85擄C
Low Power Dissipation ( V
CC
= 5.5 V )
鈥?Active Write . . . 330 mW ( Byte Write)
鈥?Active Read . . . 330 mW ( Byte Read)
鈥?Active Write . . . 358 mW ( Word Write)
鈥?Active Read . . . 330 mW ( Word Read)
鈥?Block Erase . . . 165 mW
鈥?Standby . . . 0.55 mW (CMOS-Input
Levels)
鈥?Deep Power-Down Mode . . . 0.0066 mW
Fully Automated On-Chip Erase and
Word / Byte-Program Operations
Write Protection for Boot Block
Industry Standard Command State Machine
(CSM)
鈥?Erase Suspend/Resume
鈥?Algorithm-Selection Identifier
DBJ PACKAGE
( TOP VIEW )
V
PP
NC
A17
A7
A6
A5
A4
A3
A2
A1
A0
E
V
SS
G
DQ0
DQ8
DQ1
DQ9
DQ2
DQ10
DQ3
DQ11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
RP
W
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE
V
SS
DQ15/A
鈥?
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
V
CC
PIN NOMENCLATURE
A0 鈥?A17
BYTE
DQ0 鈥?DQ14
DQ15/A 鈥?
E
G
NC
RP
VCC
VPP
VSS
W
Address Inputs
Byte Enable
Data In / Out
Data In / Out (word-wide mode),
Low-Order Address (byte-wide mode)
Chip Enable
Output Enable
No Internal Connection
Reset / Deep Power Down
5-V Power Supply
12-V Power Supply for
Program / Erase
Ground
Write Enable
description
The TMS28F400BZx is a 524 288 by 8-bit / 262 144 by 16-bit (4 194 304-bit), boot-block flash memory that can
be electrically block-erased and reprogrammed. The TMS28F400BZx is organized in a blocked architecture
consisting of one 16K-byte protected boot block, two 8K-byte parameter blocks, one 96K-byte main block, and
three 128K-byte main blocks. The device can be ordered with either a top or bottom boot-block configuration.
Operation as a 512K-byte (8-bit) or a 256K-word (16-bit) organization is user-definable.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
漏
1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 1443
鈥?/div>
HOUSTON, TEXAS 77251鈥?443
1

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