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TIBPAL20R6-25CNT Datasheet

  • TIBPAL20R6-25CNT

  • LOW-POWER HIGH-PERFORMANCE IMPACT E PAL CIRCUITS

  • 17頁(yè)

  • TI

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TIBPAL20L8-25C, TIBPAL20R4-25C, TIBPAL20R6-25C, TIBPAL20R8-25C
LOW-POWER HIGH-PERFORMANCE
IMPACT
鈩?/div>
PAL
廬
CIRCUITS
SRPS022 鈥?D2920, MAY 1987 鈥?REVISED MARCH 1992
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Low-Power, High-Performance
Reduced I
CC
of 105 mA Max
f
max
:
Without Feedback . . . 33 MHz Min
With Feedback . . . 25 MHz Min
t
pd
. . . 25 ns Max
Direct Replacement for PAL20L8A,
PAL20R4A, PAL20R6A, PAL20L8A, with at
Least 50% Reduction in Power
Preload Capability on Output Registers
Simplifies Testing
Power-Up Clear on Registered Devices (All
Register Outputs are Set Low, but Voltage
Levels at the Output Pins Go High)
Package Options Include Plastic Chip
Carriers in Addition to Plastic and Ceramic
DIPs
Dependable Texas Instruments Quality and
Reliability
DEVICE
PAL20L8
PAL20R4
PAL20R6
PAL20R8
I
INPUTS
14
12
12
12
3-STATE
O OUTPUTS
2
0
0
0
REGISTERED
Q OUTPUTS
0
4 (3-state buffers)
6 (3-state buffers)
8 (3-state buffers)
I/O
PORT
S
6
4
2
0
TIBPAL20L8鈥?/div>
JT OR NT PACKAGE
(TOP VIEW)
I
I
I
I
I
I
I
I
I
I
I
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
I
O
I/O
I/O
I/O
I/O
I/O
I/O
O
I
I
TIBPAL20L8鈥?/div>
FN PACKAGE
(TOP VIEW)
description
I
I
I
NC
I
I
I
5
6
7
8
9
10
I
I
I
NC
V
CC
I
O
4
3 2 1 28 27 26
25
24
23
22
21
20
11
19
12 13 14 15 16 17 18
I/O
I/O
I/O
NC
I/O
I/O
I/O
These programmable array logic devices feature
high speed and functional equivalency when
compared with currently available devices. These
IMPACT鈩?/div>
circuits
combine
the
latest
NC
鈥?/div>
No internal connection
AdvancedLow-Power Schottky technology with
Pin assignments in operating mode
proven titanium-tungsten fuses to provide reliable,
high-performance substitutes for conventional
TTL logic. Their easy programmability allows forquick design of custom functions and typically results in a more
compact circuit board. In addition, chip carriers are available for futher reduction in board space.
All of the register outputs are set to a low level during power-up. Extra circuitry has been provided to allow loading
of each register asynchronously to either a high or low state. This feature simplifies testing because the registers
can be set to an initial state prior to executing the test sequence.
The TIBPAL20鈥?C series is characterized from 0擄C to 75擄C.
I
I
GND
NC
I
I
O
These devices are covered by U.S. Patent 4,410,987
IMPACT is a trademark of Texas Instruments Incorporated.
PAL is a registered trademark of Advanced Micro Devices Inc.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard
warranty. Production processing does not necessarily include testing of all
parameters.
Copyright
漏
1992, Texas Instruments Incorporated
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
1

TIBPAL20R6-25CNT 產(chǎn)品屬性

  • 15

  • 集成電路 (IC)

  • 嵌入式 - PLD（可編程邏輯器件）

  • IMPACT-X™ PAL®

  • PAL

  • -

  • 5V

  • 25ns

  • 通孔

  • 24-DIP（0.300"，7.62mm）

  • 24-PDIP

  • 管件

  • 296-10108-5

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