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THS1240IPHP Datasheet

  • THS1240IPHP

  • 12-BIT 40 MSPS IF SAMPLING COMMUNICATIONS ANALOG-TO-DIGITAL ...

  • 20頁(yè)

  • TI

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THS1240
12-BIT 40 MSPS IF SAMPLING COMMUNICATIONS
ANALOG-TO-DIGITAL CONVERTER
SLAS279D 鈥?JUNE 2000 鈥?REVISED JANUARY 2001
features
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48 PHP PACKAGE
(TOP VIEW)
applications
Wireless Local Loop
Wireless Internet Access
Cable Modem Receivers
Medical Ultrasound
Magnetic Resonant Imaging
description
The THS1240 is a high-speed low noise 12-bit CMOS pipelined analog-to-digital converter. A differential sample
and hold minimizes even order harmonics and allows for a high degree of common mode rejection at the analog
input. A buffered analog input enables operation with a constant analog input impedance, and prevents transient
voltage spikes from feeding backward to the analog input source. Full temperature DNL performance allows
for industrial application with the assurance of no missing codes. The THS1240 can operate with either internal
or external references. Internal reference usage selection is accomplished simply by externally connecting
reference output terminals to reference input terminals.
AVAILABLE OPTIONS
PACKAGE
TA
鈥?40擄C to 85擄C
0擄C to 70擄C
48-TQFP
(PHP)
THS1240I
THS1240C
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
錚?/div>
2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
DV SS
CLK+
CLK鈥?/div>
DV DD
DV SS
DV SS
DV DD
DV SS
DV DD
DRVSS
DRVDD
AV SS
40-MSPS Sample Rate
12-Bit Resolution
No Missing Codes
On-Chip Sample and Hold
77-dB Spurious Free Dynamic Range at
f
IN
= 15.5 MHz
5-V Analog and Digital Supply
3-V and 5-V CMOS Compatible Digital
Output
10.4 Bit ENOB at f
IN
= 31 MHz
65 dB SNR at f
IN
= 15.5 MHz
120-MHz Bandwidth
Internal or External Reference
Buffered Differential Analog Input
2s Complement Digital Outputs
Typical 380 mW Power Consumption
Single-Ended or Differential Low-Level
Clock Input
48 47 46 45 44 43 42 41 40 39 38 37
AVSS
AVDD
AVSS
AVDD
AVSS
AVSS
DRVSS
DRVSS
DRVDD
DRVDD
VCM
AVDD
AV
SS
AV
DD
V
IN+
V
IN鈥?/div>
AV
DD
V
REFOUT鈥?/div>
V
REFIN
鈥?/div>
V
REFIN
+
V
REFOUT
+
V
BG
AV
SS
AV
DD
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D0
D1
D2
D3
D4
D5
D6
D7
D8
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D10
D11
1

THS1240IPHP 產(chǎn)品屬性

  • 250

  • 集成電路 (IC)

  • 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器

  • -

  • 12

  • 40M

  • 并聯(lián)

  • 5

  • 380mW

  • 模擬和數(shù)字

  • -40°C ~ 85°C

  • 表面貼裝

  • 48-TQFP 裸露焊盤

  • 48-HTQFP（7x7）

  • 托盤

  • 1 個(gè)差分，單極

  • 296-2839

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    HIGH STABILITY MOTOR CONTROL DIGITAL TACHOMETER CRANK SHAFT ...
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    HIGH STABILITY MOTOR CONTROL DIGITAL TACHOMETER CRANK SHAFT ...
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    HIGH STABILITY MOTOR CONTROL. DIGITAL TACHOMETER. CRANK SHAF...
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