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THS12082IDA Datasheet

  • THS12082IDA

  • 12-BIT, 8 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONV...

  • 38頁(yè)

  • TI

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THS12082
12-BIT, 8 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTERS
SLAS271 鈥?MAY 2000
features
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Simultaneous Sampling of 2 Single-Ended
Signals or 1 Differential Signal
Integrated 16 Word FIFO
Signal-to-Noise and Distortion Ratio: 66 dB
at f
I
= 2 MHz
Differential Nonlinearity Error:
鹵1
LSB
Integral Nonlinearity Error:
鹵1.5
LSB
Auto-Scan Mode for 2 Inputs
3-V or 5-V Digital Interface Compatible
Low Power: 216 mW Max
5-V Analog Single Supply Operation
Internal Voltage References . . . 50 PPM/擄C
and
鹵5%
Accuracy
Parallel
碌C/DSP
Interface
DA PACKAGE
(TOP VIEW)
D0
D1
D2
D3
D4
D5
BV
DD
BGND
D6
D7
D8
D9
RA0/D10
RA1/D11
CONV_CLK (CONVST)
DATA_AV
1
2
3
4
5
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8
9
10
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12
13
14
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16
32
31
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Radar Applications
Communications
Control Applications
High-Speed DSP Front-End
Automotive Applications
description
The THS12082 is a CMOS, low-power, 12-bit, 8 MSPS analog-to-digital converter (ADC). The speed,
resolution, bandwidth, and single-supply operation are suited for applications in radar, imaging, high-speed
acquisition, and communications. A multistage pipelined architecture with output error correction logic provides
for no missing codes over the full operating temperature range. Internal control registers allow for programming
the ADC into the desired mode. The THS12082 consists of two analog inputs, which are sampled
simultaneously. These inputs can be selected individually and confugured to single-ended or differential inputs.
An integrated 16 word deep FIFO allows the storage of data in order to take the load off of the processor
connected to the ADC. Internal reference voltages for the ADC (1.5 V and 3.5 V) are provided.
An external reference can also be chosen to suit the dc accuracy and temperature drift requirements of the
application. Two different conversion modes can be selected. In the single conversion mode, a single and
simultaneous conversion can be initiated by using the single conversion start signal (CONVST). The conversion
clock in the single conversion mode is generated internally using a clock oscillator circuit. In the continuous
conversion mode, an external clock signal is applied to the CONV_CLK input of the THS12082. The internal
clock oscillator is switched off in the continuous conversion mode.
The THS12082C is characterized for operation from 0擄C to 70擄C, and the THS12082I is characterized for
operation from 鈥?0擄C to 85擄C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
Copyright
2000, Texas Instruments Incorporated
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
1
PRODUCT PREVIEW
applications
OV_FL
RESET
AINP
AINM
REFIN
REFOUT
REFP
REFM
AGND
AV
DD
CS0
CS1
WR (R/W)
RD
DV
DD
DGND

THS12082IDA 產(chǎn)品屬性

  • Data Converter Basics

  • 46

  • 集成電路 (IC)

  • 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器

  • -

  • 12

  • 8M

  • 并聯(lián)

  • 1

  • 216mW

  • 模擬和數(shù)字

  • -40°C ~ 85°C

  • 表面貼裝

  • 32-TSSOP(0.240",6.10mm 寬)

  • 32-TSSOP

  • 管件

  • 2 個(gè)單端,單極;1 個(gè)差分,單極

  • 296-10008-ND - EVALUATION MODULE FOR THS12082

  • 296-2835-5

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