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TFP101APZP Datasheet

  • TFP101APZP

  • T1 PANELBUS DIGITAL RECEIVER

  • 18頁

  • TI

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TFP101, TFP101A
TI
PanelBus錚?/div>
DIGITAL RECEIVER
SLDS119C - MARCH 2000 鈭?REVISED OCTOBER 2003
D
Supports XGA Resolution
D
D
D
D
D
(Output Pixel Rates Up to 86 MHz)
Digital Visual Interface (DVI) Specification
Compliant
1
True-Color, 24 Bit/Pixel, 16.7M Colors at 1
or 2-Pixels Per Clock
Laser Trimmed Internal Termination
Resistors for Optimum Fixed Impedance
Matching
Skew Tolerant Up to One Pixel Clock Cycle
4x Over-Sampling
D
Reduced Power Consumption 鈭?1.8 V Core
D
D
D
D
Operation With 3.3 V I/Os and Supplies
2
Reduced Ground Bounce Using Time
Staggered Pixel Outputs
Lowest Noise and Best Power Dissipation
Using TI PowerPAD錚?Packaging
Advanced Technology Using TI 0.18-碌m
EPIC-5錚?CMOS Process
TFP101A Incorporates HSYNC Jitter
Immunity
3
description
The Texas Instruments TFP101 and TFP101A are TI
PanelBus錚?/div>
flat panel display products, part of a
comprehensive family of end-to-end DVI 1.0 compliant solutions. Targeted primarily at desktop LCD monitors
and digital projectors, the TFP101/101A finds applications in any design requiring high-speed digital interface.
The TFP101/101A supports display resolutions up to XGA in 24-bit true color pixel format. The TFP101/101A
offers design flexibility to drive one or two pixels per clock, supports TFT or DSTN panels, and provides an option
for time staggered pixel outputs for reduced ground bounce.
PowerPAD錚?advanced packaging technology results in best of class power dissipation, footprint, and ultra-low
ground inductance.
The TFP101/101A combines
PanelBus錚?/div>
circuit innovation with TI鈥檚 advanced 0.18-碌m EPIC-5錚?CMOS
process technology, along with TI PowerPAD錚?package technology to achieve a reliable, low-powered, low
noise, high-speed digital interface solution.
AVAILABLE OPTIONS
PACKAGED DEVICE
TA
100-TQFP
(PZP)
TFP101PZP
0擄C to 70擄C
TFP101APZP
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1.
2.
3.
The Digital Visual Interface Specification, DVI, is an industry standard developed by the Digital Display Working Group (DDWG) for
high-speed digital connection to digital displays The TFP101 and TFP101A are compliant to the DVI Specification Rev. 1.0.
The TFP101/101A has an internal voltage regulator that provides the 1.8-V core power supply from the externally supplied 3.3-V
supplies.
The TFP101A incorporates additional circuitry to create a stable HSYNC from DVI transmitters that introduce undesirable jitter on
the transmitted HSYNC signal.
PanelBus,
PowerPAD and EPIC-5 are trademarks of Texas Instruments.
I2C is a licensed bus protocol from Phillips Semiconductor, Inc.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
錚?/div>
2000, Texas Instruments Incorporated
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
1

TFP101APZP 產(chǎn)品屬性

  • 90

  • 集成電路 (IC)

  • 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器

  • -

  • 接收器

  • -

  • -

  • 3 V ~ 3.6 V

  • 表面貼裝

  • 100-TQFP 裸露焊盤

  • 100-HTQFP（14x14）

  • 托盤

  • 296-9987

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