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TDA9102C

H/V PROCESSOR FOR TTL V.D.U

VERTICAL SECTION

SYNCHRONIZATION INPUT : TTL COMPAT-

IBLE, NEGATIVE EDGE TRIGGERED

SYNCHRONIZATION INDEPENDENT FROM

DUTY CYCLE TIME

OSCILLATOR : FREQUENCY RANGE FROM

30Hz to 120Hz

RAMP GENERATOR WITH VARIABLE GAIN

STAGE

VERTICAL RAMP VOLTAGE REFERENCE

INTERNAL VOLTAGE REGULATOR

DC COMPATIBLE CONTROLS FOR FRE-

QUENCY, AMPLITUDE AND LINEARITY

PIN CONNECTIONS

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HORIZONTAL SECTION

SYNCHRONIZATION INPUT : TTL COMPAT-

IBLE, NEGATIVE EDGE TRIGGERED

SYNCHRONIZATION INDEPENDENT FROM

DUTY CYCLE TIME

OSCILLATOR : FREQUENCY RANGE FROM

15kHz to 100kHz

HORIZONTAL OUTPUT PULSE SHAPER

AND SHIFTER

PHASE COMPARATOR BETWEEN SYN-

CHRO AND OSCILLATOR (PLL1)

PHASE COMPARATOR BETWEEN FLYBACK

AND OSCILLATOR (PLL2)

INTERNAL VOLTAGE REGULATOR

DC COMPATIBLE CONTROLS FOR PHASE

AND FREQUENCY

HORIZONTAL OUTPUT DUTY CYCLE : 41%

POWERDIP20 (0.4)

(Plastic package)

ORDER CODES

: TDA9102C

Substrate Ground

11

12

10

9

Horizontal Phase Adjust

Phase Comparator 2 Output

Vertical Frequency Preset

C13

13

14

8

7

Horizontal Flyback Input

Horizontal Output

Vertical TTL Input

Vertical Ramp Output

15

16

6

5

Horizontal Power Ground

C5

Vertical Amplitude Adjust

Vertical Linearity Adjust

17

18

4

3

Horizontal TTL Input

Phase Comparator 1 Output

DESCRIPTION

The TDA9102C is a monolithic integrated circuit for

horizontal and vertical sync processing in mono-

chrome and color video displays driven by input

TTL compatible signals.

The TDA9102C is supplied in a 20 pin dual in line

package with pin 11 connected to ground and used

for heatsinking.

May 1996

Linearity Output

Vertical Reference Voltage

VS

19

20

2

1

C2

R1

1/7

9102001.EPS

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