1
TC7135
4-1/2 DIGIT ANALOG-TO-DIGITAL CONVERTER
FEATURES
s
s
s
s
s
s
s
s
s
s
s
s
s
s
Low Roll-Over Error .........................
鹵
1 Count Max
Guaranteed Nonlinearity Error ........
鹵
1 Count Max
Guaranteed Zero Reading for 0V Input
True Polarity Indication at Zero for Null Detection
Multiplexed BCD Data Output
TTL-Compatible Outputs
Differential Input
Control Signals Permit Interface to UARTs and
碌
Processors
Auto-Ranging Supported With Overrange and
Underrange Signals
Blinking Display Visually Indicates Overrange
Condition
Low Input Current ............................................. 1 pA
Low Zero Reading Drift ............................... 2
碌
V/
擄
C
Interfaces to TC7211A (LCD) and TC7212A (LED)
Display Drivers
Available in DIP and Surface-Mount Packages
GENERAL DESCRIPTION
The TC7135 4-1/2 digit analog-to-digital converter (ADC)
offers 50 ppm (1 part in 20,000) resolution with a maximum
nonlinearity error of 1 count. An auto-zero cycle reduces zero
error to below 10
碌V
and zero drift to 0.5
碌V/擄C.
Source
impedance errors are minimized by a 10 pA maximum input
current. Roll-over error is limited to
鹵1
count.
By combining the TC7135 with a TC7211A (LCD) or
TC7212A (LED) driver, a 4-1/2 digit display DVM or DPM can
be constructed. Overrange and underrange signals support
automatic range switching and special display blanking/flash-
ing applications.
Microprocessor-based measurement systems are sup-
ported by BUSY, STROBE, and RUN/HOLD control signals.
Remote data acquisition systems with data transfer via UARTs
are also possible. The additional control pins and multiplexed
BCD outputs make the TC7135 the ideal converter for dis-
play or microprocessor-based measurement systems.
2
3
4
5
6
ORDERING INFORMATION
Part No.
TC7135CBU
TC7135CLI
TC7135CPI
Package
64-Pin Plastic
Flat Package
28-Pin PLCC
28-Pin Plastic DIP
Temperature
Range
0擄C to +70擄C
0擄C to +70擄C
0擄C to +70擄C
TYPICAL 4-1/2 DIGIT DVM WITH LCD
4-1/2 DIGIT LCD
6.8 k
鈩?/div>
0.1 碌F
+5V
+5V
鈥?V
1
2
V
UR
28
27
26
25
24
23
22
21
20
19
18
17
16
15
+5V
120 Hz = 3 READING/SEC
CLOCK IN
5 BP
31
D1
32
33
34
30
29
28
D2
D3
D4
B3
B2
B1
+5V
1
+
V
1 16 15 14 12 5 3 4
SEGMENT
TC04
ANALOG
GROUND
1 碌F
0.1
碌F
INPUT
100 k
鈩?/div>
REF IN
OR
100 k
鈩?/div>
3 ANALOG
STROBE
0.47 碌F 4 COMMON
RUN/HOLD
INT OUT
5
1 碌F
DGND
AZ IN
6
POL
BUFF OUT
100 k
鈩?/div>
7
鈥?/div>
CLOCK
CREF
8 +
BUSY
CREF
9
D1
鈥揑NPUT
10
D2
+INPUT
11
+
+5V
D3
V
12
D5
D4
13
TC7135
B1
B8
14
B2
B4
CD4054A
7 8 13 11 10 9 2 6
BACKPLANE
D
R
I
V
E
1/4 CD4030
CD4081
7
SEG
OUT
2,3,4
6鈥?6
37鈥?0
36
+5V
OSC
OPTIONAL
CAP
35
GND
TC7211A
27 B 0
8
TC7135-10 11/6/96
TELCOM SEMICONDUCTOR, INC.
3-113
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