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TAFE1040PFB Datasheet

  • TAFE1040PFB

  • 3 V, 10-BIT 42 MSPS, AREA CCD ANALOG FRONT-END

  • 56.09KB

  • 4頁(yè)

  • TI

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TAFE1040
3 V, 10-BIT 42 MSPS, AREA CCD ANALOG FRONT-END
SLVS284 鈥?FEBRUARY 2000
features
applications
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description
The TAFE1040 is a complete area CCD analog
front-end/digitizer designed for digital camera
applications. The TAFE1040 performs all the
analog processing functions necessary to max-
mize the dynamic range, corrects various errors associated with the CCD sensor, and then digitizes the results
with an on-chip high-speed analog-to-digital converter (ADC). The key components of the TAFE1040 include:
input clamp circuitry for the CCD and analog video signals, a correlated double sampler (CDS), a programmable
gain amplifier (PGA) with 0 dB to 36 dB gain range, two internal digital-to-analog converters (DAC) for automatic
or programmable optical black level and offset calibration, a 10-bit, 42 MSPS pipeline ADC, a parallel data port
for easy microprocessor interface and a serial port for configuring internal control registers, two additional DACs
for external system control, and internal reference voltages.
Designed in advanced CMOS process, the TAFE1040 operates from a single 3-V power supply with a normal
power consumption of 180 mW at 42 MSPS and a 2-mW power-down mode.
Very high throughput rate, single 3 V operation, low power consumption, and fully integrated analog processing
circuitry make the TAFE1040 an ideal area CCD signal processing solution for the high-resolution digital camera
and camcorder applications.
The part is available in a 48-pin TQFP package and is specified over 鈥?0擄C to 75擄C operating temperature
range.
DIN
PIN
AVDD2
AGND2
DGND
DVDD
D0
D1
D2
D3
D4
D5
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
Copyright
2000, Texas Instruments Incorporated
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
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PRODUCT PREVIEW
Single-Chip CCD Analog Front-End
10-Bit, 42 MSPS, A/D Converter
Single 3-V Supply Operation
Programmable Timing Signal Delays
Low Power: 180 mW Typ, 2-mW
Power-down Mode
Differential Nonlinearity Error
鈥?<鹵0.6 LSB Typ
Integral Nonlinearity Error
鈥?<鹵1.5 LSB Typ
Programmable Gain Amplifier (PGA) With
0 dB to 36 dB Gain Range (0.045 dB/Step)
Automatic or Programmable Black Level
and Offset Calibration With Digital Filter
and Bad Pixel Limits
Additional DACs for External Analog
Setting
Serial Interface for Register Configuration
Internal Reference Voltages
48-Pin TQFP Package
D
D
Video Camcorde
Digital Still Camera
PFB PACKAGE
(TOP VIEW)
36 35 34 33 32 31 30 29 28 27 26 25
STBY
RESET
CS
SDIN
SCLK
ADCCLK
BLKG
TPP
TPM
AVDD4
AGND4
OBCLP
AGND5
RBD
RMD
RPD
AVDD5
VSS
AVDD1
AGND1
SR
SV
CLAMP
CLREF
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41
42
24
23
22
21
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19
OE
SCKP
DACO2
DACO1
AGND3
AVDD3
DIGND
DIVDD
D9
D8
D7
D6

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