1. Features
鈥?/div>
MPEGI/II-Layer 3 Hardwired Decoder
鈥?Stand-alone MP3 decoder
鈥?48, 44.1, 32, 24, 22.05, 16 KHz sampling freq.
鈥?Separated digital volume control on left and right channels (software control using
31 steps)
鈥?Bass, medium, and Treble Control (31 steps)
鈥?Bass Boost sound effect.
鈥?Ancillary data extraction
鈥?鈥淐RC Error鈥?and 鈥淢PEG Frame Synchronization鈥?indicators
Programmable Audio Output for interfacing with common audio DAC available on the
market
鈥?PCM format compatible
鈥?I
2
S format compatible
8-bit MCU C51 core based (F
MAX
= 20 MHz)
2304 bytes of Internal RAM
64 Kbytes of Code Memory
鈥?FLASH: T89C51SND1, ROM: T83C51SND1
4 Kbytes of Boot Flash Memory (T89C51SND1)
鈥?ISP: download from USB or UART to any external memory cards
USB Rev 1.1 controller
鈥?鈥淔ull speed鈥?data transmission
Built-in PLL
鈥?MP3 Audio clocks
鈥?USB clock
MultiMediaCard餂?Interface Compatibility
Atmel DataFlash餂?SPI Interface Compatibility
IDE/ATAPI Interface
2 Channels 10-bit ADC, 8KHz (8 true bit)
鈥?Battery voltage Monitoring
鈥?Voice recording controlled by software
Up to 44 bits of General Purpose I/Os for:
鈥?4-bit interrupt keyboard port for a 4 x n matrix
鈥?Smartmedia餂?software interface
Standard Two 16-bit Timers/Counters
Hardware Watchdog Timer
Standard Full Duplex UART with Baud Rate Generator
2-wire Master and Slave Modes Controller
SPI Master and Slave Modes Controller
Power Management
鈥?Power-On reset
鈥?Software programmable MCU clock
鈥?Idle mode, Power-Down mode
Operating conditions:
鈥?3V,
鹵10%,
25 mA typical operating at 25擄C
鈥?-40擄C to +85擄C
Packages
鈥?TQFP80, PLCC84 (development board)
鈥?Dice
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Single Chip
Microcontroller
with MP3
Decoder and
Man Machine
Interface
T8xC51SND1
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Rev. D 鈥?15-Nov-01
1
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