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80C52 Compatible
鈥?8051 pin and instruction compatible
鈥?Four 8-bit I/O ports + 2 I/O I2C Interface pins
鈥?Three 16-bit timer/counters
鈥?256 bytes scratch pad RAM
鈥?10 Interrupt sources with 4 priority levels
鈥?Dual Data Pointer
Variable length MOVX for slow RAM/peripherals
ISP (In System Programming) using standard V
CC
power supply.
Boot ROM contains low level FLASH programming routines and a default serial loader
High-Speed Architecture
鈥?40 MHz in standard mode
鈥?20 MHz in X2 mode (6 clocks/machine cycle)
32-Kbytes on-chip FLASH program / data Memory
鈥?Byte and page (128 bytes) erase and write
鈥?10k write cycles
鈥?On-chip 1024 bytes expanded RAM (XRAM)
鈥?Software selectable size (0, 256, 512, 768, 1024 bytes)
鈥?256 bytes selected at reset for T87C51RB2/RC2 compatibility
Keyboard interrupt interface on port P1
400-Kbits/s Multimaster I
2
C Interface
SPI Interface (Master / Slave Mode)
Sub clock 32kHz crystal oscillator
8-bit clock prescaler
Improved X2 mode with independant selection for CPU and each peripheral
Programmable Counter Array 5 Channels with:
鈥?High Speed Output,
鈥?Compare / Capture,
鈥?Pulse Width Modulator,
鈥?Watchdog Timer Capabilities
Asynchronous port reset
Full duplex Enhanced UART
Dedicated Baud Rate Generator for UART
Low EMI (inhibit ALE)
Hardware Watchdog Timer (One-time enabled with Reset-Out)
Power control modes:
鈥?Idle Mode.
鈥?Power-down mode.
鈥?Power-Off Flag.
Power supply: 4.5V to 5.5V or 2.7V to 3.6V
Temperature ranges: Commercial (0 to +70擄C) and industrial (-40擄C to +85擄C).
Packages: PLC44, VQFP44
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8-bit
Microcontroller
with Flash and
I
2
C Interface
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T89C51IC2
Summary
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Description
T89C51IC2 is a high performance FLASH version of the 80C51 8-bit microcontrollers.
It contains a 32-Kbytes Flash memory block for program and data.
The 32-Kbytes FLASH memory can be programmed either in parallel mode or in serial
mode with the ISP capability or with software. The programming voltage is internally
generated from the standard V
CC
pin.
The T89C51IC2 retains all features of the 80C52 with 256 bytes of internal RAM, a 7-
source 4-level interrupt controller and three timer/counters.
Rev. C 鈥?3-Dec-01
1
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