T48C893
Flash Version for M44C090/890 and M44C092/892
The T48C893 is the multiple times programmable (MTP) version for the MARC4 ROM types M44C090/890,
M44C092/892. The MTP is designed with EEPROM cells so it can be programmed several times. To offer full compati-
bility with each ROM version, the I/O configuration is stored into a separate internal EEPROM block during
programming.The configuration is download to the I/Os with every power-on reset..
Features / Benefits
D
4-Kbyte EEPROM program memory
D
EEPROM programmable options
D
Read protection for the EEPROM program memory
D
16 bidirectional I/Os
D
Up to 7 external / internal interrupt sources
D
8 hardware and software interrupt priorities
D
Multifunction timer/counter with prescaler/interval
timer
D
Programmable system-clock with prescaler and five
different clock sources
V SS VDD
D
Wide supply voltage range (1.8 to 6.5 V)
D
Very low sleep current (< 1
碌A(chǔ))
D
2
D
256
512 bit EEPROM data memory
4 bit RAM data memory
D
Synchronous serial interface (2-wire, I
2
C, 3-wire)
D
Watchdog, POR and brown-out function
D
Voltage monitoring incl. Lo_BAT detect
D
Multi-chip link for U3280M
OSC1 OSC2
Brown-out protect.
RESET
Voltage monitor
External input
VMI
BP10
Port 1
BP13
BP20/NTE
Data direction
Port 2
BP21
BP22
BP23
External
RC
Crystal
oscillators clock input
oscillators
Clock management
UTCM
Timer 1
interval- and
watchdog timer
Timer 2
8/12-bit timer
with modulator
SSI
Serial interface
Timer 3
8-bit
timer / counter
with modulator
and demodulator
T2I
T2O
SD
SC
T3O
T3I
EEPROM
4 K x 8 bit
RAM
256 x 4 bit
MARC4
4-bit CPU core
I/O bus
Data direction +
interrupt control
Port 5
Data direction +
alternate function
Port 4
Data dir. +
alt. function
Port 6
EEPROM
2
32
16 bit
BP50
BP52
BP42
BP40
INT1
INT3
T2O BP43 INT6
BP53
BP51
SC BP41
INT3
VMI
INT1
INT6
SD
T2I
BP60
T3O
BP63
T3I
Figure 1. Block diagram T48C893
Rev. A4, 22-Jan-02
1 (82)