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SY89426JCTR Datasheet

  • SY89426JCTR

  • SONET OC-12/OC-3 CLOCK SYNTHESIZER

  • 93.43KB

  • 6頁

  • MICREL   MICREL

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SONET OC-12/OC-3
CLOCK SYNTHESIZER
FEATURES
s
Single chip source for 622.08MHz and 155.52MHz
clocks
s
622.08MHz output is differential PECL, 155.52MHz
output is single-ended PECL
s
TTL/CMOS compatible inputs and reference output
s
SONET compliant jitter performance (
鈮?/div>
0.01UI)
s
Choice of three reference frequencies
s
Only 395mW (typ)
s
Complies with Bellcore, CCITT and ANSI standards
s
Single +5 volt power supply
s
Fully compatible with industry standard 10KH I/O
levels
s
Available in 28-pin PLCC package
ClockWorks鈩?/div>
SY89426
DESCRIPTION
Micrel-Synergy's SY89426 Multi-Output Phase Locked
Loop (PLL) is a SONET compliant clock generator providing
622.08MHz, 155.52MHz and retimed reference clock
outputs. The PLL produces low jitter OC-12/STS-12 and
OC-3/STS-3 rate clocks from an input reference clock of
38.88, 51.84, or 77.76MHz. Additionally, the input reference
clock is retimed and provided as a TTL/CMOS compatible
output, which may be disabled to minimize switching noise.
The SY89426 operates from a single +5 volt supply, and
requires only a simple series RC loop filter.
Coupling Micrel-Synergy's advanced PLL technology
with our proprietary ASSET鈩?bipolar process has produced
a clock generator IC which exceeds applicable Bellcore
and ANSI specifications, while setting a new standard for
performance and flexibility.
TYPICAL APPLICATION
PIN CONFIGURATION
RETRFCK
+3V
VCC
VCCO
CK622P
(PECL)
CK622N
2X 50鈩?/div>
622.08MHz
CLOCK OUT
+3V
25 24 23 22 21 20 19
CLOCK
IN
0.1uF
RFCK
(TTL)
GND
GND
SEL39
SEL78
RFCK
V
CC
DISC
V
CC
RST
V
CC
+5V
+5V
FLTRP
FLTRN
26
27
28
1
2
3
4
5
6
7
8
9
10 11
18
17
V
CC
V
CC
CK622P
CK622N
V
CCO
CK155
GND
FLTRN
FLTRP
SY89426
CK155
(PECL)
RETRFCK
(TTL)
GND
RST DISC
(TTL) (TTL)
PLCC
TOP VIEW
J28-1
16
15
14
13
12
1000鈩?/div>
SEL39
(TTL)
SEL78
(TTL)
50鈩?/div>
155.52MHz
CLOCK OUT
RETIMED
REFOUT
NC
NC
GND
NC
GND
GND
GND
Rev.: F
NC
Amendment: /0
1
Issue Date: July, 1999

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