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SY55852UKITR Datasheet

  • SY55852UKITR

  • D FLIP-FLOP

  • 7頁

  • MICREL   MICREL

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Micrel, Inc.
D FLIP-FLOP
SuperLite鈩?/div>
SY55852U
SuperLite鈩?/div>
SY55852U
FEATURES
s
2.5GHz min. f
MAX
s
2.3V to 5.7V power supply
s
Single bit register memory
s
Synchronizes 1 bit of data to a clock
s
Optimized to work with SuperLite鈩?family
s
Fully differential
s
Accepts CML, PECL, LVPECL input logic levels
s
Source terminated CML outputs for fast edge rates
s
Available in a tiny 10-pin MSOP
SuperLite鈩?/div>
DESCRIPTION
The SY55852U is a flip-flop used to synchronize data
to a clock. Its differential output will reproduce and
remember the value on its input at the rising edge of the
clock. In addition, an asynchronous, level sensitive reset
is provided. For a synchonous reset, the SY55851U
AnyGate鈩?can be used.
SY55852U inputs can be terminated with a single
resistor between the true and complement pins of a given
input.
The SY55852U is a member of Micrel's SuperLite鈩?/div>
family of high-speed CML logic. This family features very
small packaging and 2.3V to 5.7V operation.
APPLICATIONS
s
High-speed logic
s
OC-48 communication systems
FUNCTIONAL BLOCK DIAGRAM
DATA
CLOCK
D
Q
OUT
R
RESET
SuperLite is a trademark of Micrel, Inc.
M9999-110705
hbwhelp@micrel.com or (408) 955-1690
Rev.: D
Amendment: /0
1
Issue Date: November 2005

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