High bandwidth to XGHz min.
鈩?/div>
internal input pulldown resistors
s
Q output will default LOW with inputs open or at V
EE
s
Available in 8-pin SOIC and 10-pin MSOP packages
DESCRIPTION
The SY10EP58V is a 2:1 multiplexer. The device is
pin and functionally equivalent to the SY100EL58 device.
PIN CONFIGURATION/BLOCK DIAGRAM
PIN NAMES
Pin
Function
ECL Data Inputs
ECL Select Inputs
ECL Data Outputs
NC 1
Da 2
Db 3
SEL 4
1
MUX
0
8 VCC
7 Q
6 /Q
5 VEE
Da, Db
SEL
Q, /Q
Available in 8-Pin SOIC or MSOP package
Rev.: A
Amendment: /1
1
Issue Date: December 2000