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SY10EP53ZC Datasheet

  • SY10EP53ZC

  • 5V/3.3V DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP WITH SET AND...

  • 5頁

  • MICREL   MICREL

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Micrel
5V/3.3V DIFFERENTIAL DATA
AND CLOCK D FLIP-FLOP WITH
SET AND RESET
ECL Pro鈩?/div>
SY10EP53V
SY10EP53V
FINAL
ECL Pro鈩?/div>
FEATURES
s
3.3V and 5V power supply options
s
3.0GHz toggle frequency
s
75K
鈩?/div>
internal input pulldown resistors
s
Available in 10-pin MSOP package
ECL Pro鈩?/div>
DESCRIPTION
The SY10EP53V is a differential data, differential clock
D flip-flop with set and reset. The EP53V is ideally suited
for those applications which require the ultimate in AC
performance.
Data enters the master portion of the flip-flop when
the clock is LOW and is transferred to the slave, and
thus the outputs, upon a positive transition of the clock.
The differential clock inputs also allow the EP53V to be
used as a negative edge triggered device. Both set and
reset inputs are asynchronous, level triggered signals.
The EP53V employs input clamping circuitry so that,
under open input conditions (pulled down to V
EE
), the
outputs of the device will remain stable.
PIN CONFIGURATION/BLOCK DIAGRAM
1
VCC
2
D
Flip-Flop
D
3
/D
5
4
CLK /CLK
SET
10
MSOP
TOP VIEW
ECL Pro is a trademark of Micrel, Inc.
Rev.: C
Amendment: /0
S
R
Q
9
/Q RESET VEE
6
7
8
PIN NAMES
Pin
D, /D
CLK, /CLK
Q, /Q
V
CC
, V
EE
SET
RESET
Function
Data Input (ECL)
Clock Input (ECL)
Data Output (ECL)
Power Supply
ECL Asynchonous Set
ECL Asynchonous Reset
TRUTH TABLE
(1)
D
L
H
X
X
X
Note 1.
SET
L
L
H
L
H
RESET
L
L
L
H
H
CLK
Z
Z
X
X
X
Q
L
H
H
L
UNDEF
Z = LOW-to-HIGH transition.
1
Issue Date: March 2003

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