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SY10EP31VZC Datasheet

  • SY10EP31VZC

  • 5V/3.3V, 3GHz PECL/LVPECL D FLIP-FLOP WITH SET AND RESET

  • 83.18KB

  • 6頁

  • MICREL   MICREL

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Micrel
5V/3.3V, 3GHz PECL/LVPECL
D FLIP-FLOP WITH SET AND RESET
ECL Pro鈩?/div>
SY10EP31V
SY10EP31V
FINAL
ECL Pro鈩?/div>
FEATURES
s
Guaranteed >3GHz bandwidth over temperature
s
Guaranteed <440ps propagation delay
s
3.3V and 5V power supply options
s
Wide operating temperature range: 鈥?0
擄
C to +85
擄
C
s
Available in 8-pin (3mm) MSOP and SOIC package
ECL Pro鈩?/div>
DESCRIPTION
The SY10EP31V is a D flip-flop with set and reset.
The device is pin and functionally equivalent to the EL31
and LVEL31 devices. With AC performance much faster
than the EL31 and LVEL31 devices, the EP31V is ideal
for applications requiring the fastest AC performance
available. Both SET and RESET inputs are asynchronous,
level triggered signals. Data enters the master portion of
the flip-flop when CLK is low and is transferred to the
slave, and thus the outputs, upon a positive transition of
the CLK.
PIN CONFIGURATION/BLOCK DIAGRAM
SET 1
S
8 VCC
D
D 2
CLK 3
RESET 4
Flip
Flop
R
7 Q
6 /Q
5 VEE
PIN NAMES
Pin
Function
ECL Clock Inputs
ECL Asynchronous Reset
ECL Asynchronous Set
ECL Data Input with Internal 75k鈩?Pull-Down
Resistor, Default State is LOW.
ECL Data Outputs
Positive Supply
Negative, 0 Supply
8-Pin MSOP and SOIC Packages
CLK
RESET
SET
D
Q, /Q
V
CC
V
EE
TRUTH TABLE
D
L
H
X
X
X
SET
L
L
H
L
H
RESET
L
L
L
H
H
CLK
Z
Z
X
X
X
Q
L
H
H
L
UNDEF
Z = LOW to HIGH Transition
ECL Pro is a trademark of Micrel, Inc.
Rev.: C
Amendment: /0
1
Issue Date: March 2003

SY10EP31VZC 產(chǎn)品屬性

  • 95

  • 集成電路 (IC)

  • 邏輯 - 觸發(fā)器

  • 10EP

  • 設(shè)置（預(yù)設(shè)）和復(fù)位

  • D 型

  • 差分

  • 1

  • 1

  • 3GHz

  • 340ps

  • 正邊沿

  • -

  • 4.5 V ~ 5.5 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 8-SOIC（0.154"，3.90mm 寬）

  • 管件

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